# IEEE Transactions on Circuits and Systems I: Regular Papers

## Filter Results

Displaying Results 1 - 25 of 31

Publication Year: 2007, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems&mdash;I: Regular Papers publication information

Publication Year: 2007, Page(s): C2
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• ### Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation

Publication Year: 2007, Page(s):933 - 940
Cited by:  Papers (62)
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Design procedures for three-stage CMOS operational transconductance amplifiers employing nested-Miller frequency compensation are presented in this paper. After describing the basic methodology on a Class-A topology, some modifications, to increase swing, slew-rate and current drive capability, are subsequently discussed for a Class-AB solution. The approaches developed are simple as they do not i... View full abstract»

• ### An Analog Approach to Suppressing In-Band Narrow-Band Interference in UWB Receivers

Publication Year: 2007, Page(s):941 - 950
Cited by:  Papers (22)
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Due to the huge bandwidth of ultra-wide-band (UWB) systems, in-band narrow-band interference (NBI) may hinder receiver performance. Sources of potential NBI that lie within the IEEE 802.15.3a UWB bandwidth are presented. To combat interference in multi-band orthogonal frequency-division multiplexing (MB-OFDM) UWB systems, an analog notch filter is designed to be included in the UWB receive chain. ... View full abstract»

• ### Indirect Programming of Floating-Gate Transistors

Publication Year: 2007, Page(s):951 - 963
Cited by:  Papers (24)
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Floating-gate (FG) transistors are useful for precisely programming a large array of current sources. Present FG programming techniques require disconnection of the transistor from the rest of its circuit while it is being programmed. We present a new method of programming FG transistors that does not require this disconnection. In this indirect programming method, two transistors share a FG allow... View full abstract»

• ### Robust High-Gain Amplifier Design Using Dynamical Systems and Bifurcation Theory With Digital Postprocessing Techniques

Publication Year: 2007, Page(s):964 - 973
Cited by:  Papers (5)
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A CMOS differential positive feedback amplifier (PFA) and its inherent nonlinearity were analyzed. Based on nonlinear dynamical systems and bifurcation theory, we predicted bifurcation and hysteresis phenomena in the PFA. An algorithm, which can be implemented using simple digital logic, was developed to measure the PFA's open-loop stability as the bifurcation parameter changes. Parameter-tuning a... View full abstract»

• ### Spectral Shaping of Dithered Quantization Errors in Sigma&ndash;Delta Modulators

Publication Year: 2007, Page(s):974 - 980
Cited by:  Papers (11)  |  Patents (3)
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A well-known problem in sigma-delta (SigmaDelta) modulators is limit cycle oscillations, which can cause unwanted tones of significant power to appear in the quantization error. This problem becomes more severe as the amplitude of an input signal is small. The unwanted tones can be eliminated from the quantization error by employing a properly chosen random sequence to break up the limit cycle osc... View full abstract»

• ### A Multichip Pulse-Based Neuromorphic Infrastructure and Its Application to a Model of Orientation Selectivity

Publication Year: 2007, Page(s):981 - 993
Cited by:  Papers (79)
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The growing interest in pulse-mode processing by neural networks is encouraging the development of hardware implementations of massively parallel networks of integrate-and-fire neurons distributed over multiple chips. Address-event representation (AER) has long been considered a convenient transmission protocol for spike based neuromorphic devices. One missing, long-needed feature of AER-based sys... View full abstract»

• ### Generalized Comb Decimation Filters for$\Sigma\Delta$A/D Converters: Analysis and Design

Publication Year: 2007, Page(s):994 - 1005
Cited by:  Papers (73)
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This paper addresses the design of generalized comb decimation filters, proposing some novel decimation schemes tailored to SigmaDelta modulators. We present a mathematical framework to optimize the proposed decimation filters in such a way as to increase the SigmaDelta quantization noise (QN) rejection around the so called folding bands, frequency intervals whose QN gets folded down to baseband b... View full abstract»

• ### Phase-Error Measurement and Compensation in PLL Frequency Synthesizers for FMCW Sensors&mdash;I: Context and Application

Publication Year: 2007, Page(s):1006 - 1017
Cited by:  Papers (28)  |  Patents (1)
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The synthesis of linear frequency sweeps or chirps is required, among others, in frequency-modulated continuous-wave radar systems for object position estimation. Low phase and frequency errors in sweeps with high bandwidth are a prerequisite for good accuracy and resolution, but, in certain applications where high measurement rates are desired, the additional demand for short sweep cycles has to ... View full abstract»

• ### Signature Testing of Analog and RF Circuits: Algorithms and Methodology

Publication Year: 2007, Page(s):1018 - 1031
Cited by:  Papers (76)
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There are mainly two factors responsible for rapidly escalating production test costs of today's RF and high-speed analog circuits: 1) the high cost of high-speed and RF automatic test equipments and 2) long test times required by elaborate performance tests. In this paper, we propose a low-cost signature test methodology for accelerated production testing of analog and RF integrated circuits. As ... View full abstract»

• ### Characterization of a Flip-Flop Metastability Measurement Method

Publication Year: 2007, Page(s):1032 - 1040
Cited by:  Papers (13)
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We characterize a proposed metastability measurement system in which asynchronous data input and sampling clock frequencies trigger metastability. We develop an equation describing the time interval between data and clock inputs for practical frequencies and show that it takes on discrete values in the absence of jitter and that the presence of jitter perturbs these values. Finally, we present exp... View full abstract»

• ### A Residue-to-Binary Converter for a New Five-Moduli Set

Publication Year: 2007, Page(s):1041 - 1049
Cited by:  Papers (68)
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The efficiency of the residue number system (RNS) depends not only on the residue-to-binary converters but also the operand sizes and the modulus in each residue channel. Due to their special number theoretic properties, RNS with a moduli set consisting of moduli in the form of 2 <sup>n</sup>plusmn1 is more attractive than those with other forms of moduli. In this paper, a new five-mod... View full abstract»

• ### A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design

Publication Year: 2007, Page(s):1050 - 1059
Cited by:  Papers (98)
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In this paper, we propose a novel full adder design using as few as ten transistors per bit. Compared with other low-gate-count full adder designs using pass transistor logic, the proposed design features lower operating voltage, higher computing speed and lower energy (power delay product) operation. The design adopts inverter buffered xor/xnor designs to alleviate the threshold voltage loss prob... View full abstract»

• ### Low-Power State-Parallel Relaxed Adaptive Viterbi Decoder

Publication Year: 2007, Page(s):1060 - 1068
Cited by:  Papers (17)  |  Patents (2)
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Although it possesses reduced computational complexity and great power saving potential, conventional adaptive Viterbi algorithm implementations contain a global best survivor path metric search operation that prevents it from being directly implemented in a high-throughput state-parallel decoder. This limitation also incurs power and silicon area overhead. This paper presents a modified adaptive ... View full abstract»

• ### A 4-kb Low-Power SRAM Design With Negative Word-Line Scheme

Publication Year: 2007, Page(s):1069 - 1076
Cited by:  Papers (21)
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The physical implementation of a prototypical 250-MHz CMOS 4-T SRAM is described in this paper. The proposed SRAM cell takes advantage of a negative word-line scheme to minimize the leakage current of the cell access transistors. As a result, the standby power consumption is drastically reduced. The proposed 4-kb 4-T SRAM is measured to consume 0.32 mW in the standby mode, and a 3.8-ns access time... View full abstract»

• ### Comparative Analysis of Shift Variance and Cyclostationarity in Multirate Filter Banks

Publication Year: 2007, Page(s):1077 - 1087
Cited by:  Papers (16)
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Multirate filter banks introduce periodic time-varying phenomena into their subband signals. The nature of these effects depends on whether the signals are regarded as deterministic or as random signals. We analyze the behavior of deterministic and wide-sense stationary (WSS) random signals in multirate filter banks in a comparative manner. While aliasing in the decimation stage causes subband ene... View full abstract»

• ### GSR: A New Genetic Algorithm for Improving Source and Channel Estimates

Publication Year: 2007, Page(s):1088 - 1098
Cited by:  Papers (10)
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In this paper, we introduce a new genetic algorithm, which allows us to refine the estimates of information source symbols and channel estimates obtained by any identification algorithm. Instead of searching the entire space, the proposed algorithm searches for the refined estimates in the subspaces near the initial estimate. Creation of initial guesses by using problem specific information and ne... View full abstract»

• ### Circuit Theoretic Classification of Parallel Connected DC&ndash;DC Converters

Publication Year: 2007, Page(s):1099 - 1108
Cited by:  Papers (70)
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This paper describes a classification of paralleling schemes for dc-dc converters from a circuit theoretic viewpoint. The purpose is to provide a systematic classification of the types of parallel converters that can clearly identify all possible structures and control configurations, allowing simple and direct comparison of the characteristics and limitations of different paralleling schemes. In ... View full abstract»

• ### Inducing Chaos in Electronic Circuits by Resonant Perturbations

Publication Year: 2007, Page(s):1109 - 1119
Cited by:  Papers (17)
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We propose a scheme to induce chaotic attractors in electronic circuits. The applications that we are interested in stipulate the following three constraints: 1) the circuit operates in a stable periodic regime far away from chaotic behavior; 2) no parameters or state variables of the circuit are directly accessible to adjustment and 3) the circuit equations are unknown and the only available info... View full abstract»

• ### Bifurcation Analysis of PWM-1 Voltage-Mode-Controlled Buck Converter Using the Exact Discrete Model

Publication Year: 2007, Page(s):1120 - 1130
Cited by:  Papers (66)
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Nonlinear phenomena in power electronic circuits are generally studied through discrete-time maps. However, there exist very few circuit configurations (like, for example, the current-mode-controlled dc-dc converters or current programmed H-bridge inverter) for which the map can be obtained in closed form. In this paper, we show that, in a voltage-mode-controlled dc-dc converter, if the switching ... View full abstract»

• ### New Sufficient Conditions for Global Robust Stability of Delayed Neural Networks

Publication Year: 2007, Page(s):1131 - 1141
Cited by:  Papers (45)
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In this paper, we continue to explore application of nonsmooth analysis to the study of global asymptotic robust stability (GARS) of delayed neural networks. In combination with Lyapunov theory, our approach gives several new types of sufficient conditions ensuring GARS. A significant common aspect of our results is their low computational complexity. It is demonstrated that the reported results c... View full abstract»

• ### Positive Realness and Absolute Stability Problem of Descriptor Systems

Publication Year: 2007, Page(s):1142 - 1149
Cited by:  Papers (37)
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This paper considers a class of nonlinear descriptor systems described by a linear time-invariant descriptor system with feedback-connected sector-constrained nonlinearities. First, we discuss the positive realness problem of descriptor systems and present a new version of positive real lemma. Second, we define the notion of strongly absolute stability (SAB) which is equivalent to the linear part ... View full abstract»

• ### Blind-Source Separation Based on Decorrelation and Nonstationarity

Publication Year: 2007, Page(s):1150 - 1158
Cited by:  Papers (12)
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In this paper, discrete-time blind-source separation (BSS) of instantaneous mixtures is studied. Decorrelation-based sufficient criteria for BSS of stationary and nonstationary sources are derived based on nonstationarity and nonwhiteness. A gradient algorithm is proposed based on these criteria. A batch-data algorithm and an on-line algorithm are developed based on the corollaries of the BSS crit... View full abstract»

• ### 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)

Publication Year: 2007, Page(s): 1159
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## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK