IEEE Transactions on Circuits and Systems for Video Technology

Currently existing subpixel motion estimation algorithms require interpolation of interpixel values which undesirably increases the overall complexity and data flow and deteriorates the estimation accuracy. We develop discrete cosine transform (DCT)-based techniques to estimate subpel motion at different desired subpel levels of accuracy in the DCT domain without interpolation. We show that subpix... View full abstract»

This paper proposes a new error concealment algorithm for packet video, effectively eliminating error propagation effects. Most standard video codecs use motion compensation to remove temporal redundancy. With such motion-compensated interframe processing, any packet loss may generate serious error propagation over more than ten consecutive frames. This kind of error propagation leads to perceptua... View full abstract»

We propose a two-stage variable block-size multiresolution motion estimation (MRME) algorithm. In this algorithm, a method to reduce the amount of motion information is developed, and a bit allocation method minimizing the sum of the motion information and the prediction error is obtained in the wavelet transform domain. In the first stage of the proposed scheme, we utilize a set of wavelet compon... View full abstract»

We develop a method for designing discrete cosine transform (DCT) coefficient multipliers in order to approximate the operation of two-dimensional (2-D) convolution of an image with a given kernel. The method is easy to implement on compressed formats of DCT-based compression methods (JPEG, MPEG, H.261) by using decoding quantization tables that are different from the encoding quantization tables View full abstract»

The need for high-performance image processing systems has led to the design and development of several application-specific parallel processing systems. An SIMD linear array processor with dynamic frequency clocking is proposed for real-time image processing applications. The architecture uses a novel concept called dynamic frequency clocking which allows the processor to vary the clock frequency... View full abstract»

There has been an outburst of research in image and video compression for transmission over noisy channels. Channel matched source quantizer design has gained prominence. Further, the presence of variable-length codes in compression standards like the JPEG and the MPEG has made the problem more interesting. Error-resilient entropy coding (EREC) has emerged as a new and effective method to combat c... View full abstract»

A lightweight genetic search algorithm (LGSA) is proposed. Different evolution schemes are investigated, such that the control overheads are largely reduced. It is also shown that the proposed LGSA can be viewed as a novel expansion of the three-step search algorithm (TSS). It can be seen from the simulation results that the performance of LGSA is very similar to that of the full search algorithm ... View full abstract»

Digital video's increased popularity has been driven to a large extent by a flurry of international standards (MPEG-1, MPEG-2, H.263, etc). In most standards, the rate control scheme, which plays an important role in improving and stabilizing the decoding and playback quality, is not defined, and thus different strategies can be implemented in each encoder design. Several rate-distortion (R-D)-bas... View full abstract»

This paper presents an architectural enhancement to reduce the power consumption of the full-search block-matching (FSBM) motion estimation. Our approach is based on eliminating unnecessary computation using conservative approximation. Augmenting the estimation technique to a conventional systolic-architecture-based VLSI motion estimation reduces the power consumption by a factor of 2, while still... View full abstract»

The widespread use of block-based interframe motion estimation for video sequence compression in both MPEG and H.263 standards is due to its effectiveness and simplicity of implementation. Nevertheless, the high computational complexity of the full-search algorithm has motivated a host of suboptimal but faster search strategies. A popular example is the three-step search (TSS) algorithm. However, ... View full abstract»

We present and compare methods for choosing motion vectors for block-based motion-compensated video coding. The primary focus is on videophone and videoconferencing applications, where low bit rates are necessary, where motion is usually limited, and where the amount of computation is also limited. In a typical block-based motion-compensated video coding system, motion vectors are transmitted alon... View full abstract»

This paper presents a detailed design study of a high-speed, single-chip architecture for video signal processing (VSP), developed as part of the Princeton VSP Project. In order to define the architectural parameters by examining the area and delay tradeoffs, we start by designing parameterizable versions of key modules, and we perform VLSI modeling experiments in a 0.25 μm process. Based on th... View full abstract»