IET Circuits, Devices & Systems

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• 3–10 GHz noise-cancelling CMOS LNA using gm-boosting technique

Publication Year: 2018, Page(s):12 - 16
| | PDF (1602 KB)

An ultra-wideband (UWB) low-noise amplifier (LNA) using a 0.11 μm CMOS technology is proposed. The common-gate (CG) input stage for wideband input impedance matching and the common-source (CS) stage for noise cancelling are applied. In the proposed LNA, the current of the CG input stage can be significantly reduced by applying the gm-boosting technique using the noise-canc... View full abstract»

• Low-voltage fully differential difference transconductance amplifier

Publication Year: 2018, Page(s):73 - 81
| | PDF (4087 KB)

A new complementary metal-oxide-semiconductor (CMOS) structure for fully differential difference transconductance amplifier (FDDTA) is presented in this study. Thanks to using the non-conventional quasi-floating-gate (QFG) technique the circuit is capable to work under low-voltage supply of 0.6 V with extended input voltage range and with class AB output stages. The QFG multiple-input metal-oxide-... View full abstract»

• Low-jitter DLL applied for two-segment TDC

Publication Year: 2018, Page(s):17 - 24
| | PDF (4873 KB)

A low-jitter delay-locked loop (DLL) for high-resolution time-to-digital converter (TDC) is proposed in this study. The generated high accurate and low-jitter outputs with uniformly distributed multiphase clocks directly from the voltage-controlled delay line (VCDL) in DLL are applied to two-segment TDC. For reducing the static phase offset in locked state, the charge pump with interior feedback l... View full abstract»

• Low-power 2.4 GHz ZigBee transceiver with inductor-less radio-frequency front-end for Internet of things applications

Publication Year: 2018, Page(s):209 - 214
| | PDF (4816 KB)

A fully integrated low-power 2.4 GHz ZigBee transceiver with inductor-less radio-frequency front-end in 180 nm complementary metal-oxide-semiconductor is presented. The proposed double push-pull low noise amplifier collaborates with a current-mode down-converter to provide wideband low-noise amplification, as well as the out-of-band blocker resilience. To save power, a sliding frequency synthesise... View full abstract»

• Hardware design of multiclass SVM classification for epilepsy and epileptic seizure detection

Publication Year: 2018, Page(s):108 - 115
| | PDF (1854 KB)

An automatic detection system for distinguishing healthy, ictal, and inter-ictal EEG signals plays an important role in medical practice. This paper presents a very large scale integration (VLSI) architecture of three-class classification for epilepsy and seizure detection. In order to find out the most efficient three-class classification scheme for hardware implementation, several multiclass non... View full abstract»

• Low-power successive approximation ADC using split-monotonic capacitive DAC

Publication Year: 2018, Page(s):203 - 208
| | PDF (3087 KB)

A power-efficient successive approximation analogue-to-digital converter (SA-ADC) is proposed. In order to reduce the energy consumption of the employed capacitive digital-to-analogue converter (DAC), a new low-energy capacitor switching technique is proposed which consumes no switching energy during the first three comparison steps. Moreover, an energy-efficient split-monotonic technique is utili... View full abstract»

• Low-jitter spread spectrum clock generator using charge pump frequency detector in 0.18 μm CMOS for USB3.1 transceivers

Publication Year: 2018, Page(s):99 - 107
| | PDF (6135 KB)

This study presents a spread spectrum clock generator (SSCG) circuit for high-speed applications. The proposed SSCG adopts a phased locked loop with two dual voltage-controlled oscillators and a frequency modulation loop implemented with a novel control unit to achieve the desired spectrum-spreading profile. The control unit consists of an analogue charge pump-based frequency comparator that can d... View full abstract»

• Six-bit, reusable comparator stage-based asynchronous binary-search SAR ADC using smart switching network

Publication Year: 2018, Page(s):124 - 131
| | PDF (5441 KB)

A reusable comparator stage-based asynchronous binary-search Successive Approximation Register (SAR) analogue-to-digital converter (ADC) with a smart reference range prediction network is presented in this brief. The proposed architecture has an advantageous merit of using only N comparators in comparison with original binary-search ADC and flash ADC. The design uses selection logic which s... View full abstract»

• Design of high-speed, low-power, and area-efficient FIR filters

Publication Year: 2018, Page(s):1 - 11
| | PDF (1837 KB)

In a recent work, we have introduced a new multiple constant multiplication (MCM) algorithm, denoted as RADIX-2r. The latter exhibits the best results in speed and power, comparatively with the most prominent algorithms. In this paper, the area aspect of RADIX-2r is more specially investigated. RADIX-2r is confronted to area efficient algorithms, notably to the cum... View full abstract»

• Systematic circuit design and analysis of a non-ideal DC–DC pulse width modulation boost converter

Publication Year: 2018, Page(s):144 - 156
| | PDF (6815 KB)

This study presents systematic design and detailed circuit analysis of a non-ideal DC-DC pulse width modulation boost converter. An accurate mathematical formula is thrived to evaluate the duty cycle, which enables the converter to neutralise the voltage drop across the parasitic elements. Furthermore, the modified relationships for the design of inductor have been obtained, which satisfy the requ... View full abstract»

• Ultra-low-power, high PSRR CMOS voltage reference with negative feedback

Publication Year: 2017, Page(s):535 - 542
| | PDF (3881 KB)

Based on negative feedback technique, a complementary metal-oxide semiconductor (CMOS) voltage reference with ultra-low-power, low supply voltage and high-power supply rejection ratio (PSRR) is proposed and simulated using a 0.18 standard micrometre CMOS technology. The operating supply voltage ranges from 0.85 V to 2.5 V and the temperature ranges from -20°C to 80°C. The voltage ref... View full abstract»

• Accurate performance evaluation of VLSI designs with selected CMOS process parameters

Publication Year: 2018, Page(s):116 - 123
| | PDF (4889 KB)

As process monitors have become vital components in modern very-large-scale integration (VSLI) designs, performance targets often determine the physical implementation of such monitors. However, as various process and environmental parameters collectively affect circuit behaviour, the design of process monitors can be difficult. In addition, process parameters from device-level models may not prov... View full abstract»

• Graphene-based biosensors: methods, analysis and future perspectives

Publication Year: 2015, Page(s):434 - 445
| | PDF (991 KB)

Graphene (GN), a single layer two-dimensional structure nanomaterial, exhibits exceptional physical, electrical and chemical properties that lead to many applications from electronics to biomedicine. The unique parameters of GN, notably its considerable electron mobility, thermal conductivity, high surface area and electrical conductivity, are bringing heightened attention into biomedical applicat... View full abstract»

• Comparative study of 16-order FIR filter design using different multiplication techniques

Publication Year: 2017, Page(s):196 - 200
| | PDF (2455 KB)

This study represents designing and implementation of a low power and high speed 16 order FIR filter. To optimise filter area, delay and power, different multiplication techniques such as Vedic multiplier, add and shift method and Wallace tree (WT) multiplier are used for the multiplication of filter coefficient with filter input. Various adders such as ripple carry adder, Kogge Stone adder, Brent... View full abstract»

• Analysis and design of single phase power factor correction with DC–DC SEPIC Converter for fast dynamic response using genetic algorithm optimised PI controller

Publication Year: 2018, Page(s):164 - 174
| | PDF (8171 KB)

This study presents the analysis and design of a single phase power factor correction (PFC) scheme using a DC-DC single ended primary inductance converter with genetic algorithm (GA)-tuned proportional integral (PI) controllers. A systematic off-line design approach using GA for optimising the parameters of the PI controller is proposed and the performance is compared with the conventional Z-N tun... View full abstract»

• Multi-resonant gate drive circuit of isolating-gate GaN HEMTs for tens of MHz

Publication Year: 2017, Page(s):261 - 266
| | PDF (3647 KB)

Research of power supplies for megahertz (MHz) class applications such as a semiconductor manufacturing apparatus, induction heater and wireless transfer is carried out. A liner amplifier is generally used for MHz class applications. The loss of the power devices on a liner amplifier is theoretically high. To reduce the loss, the class E and Φ2 inverters are proposed, and some of... View full abstract»

• Hybrid AlGaN/GaN high-electron mobility transistor: design and simulation

Publication Year: 2018, Page(s):33 - 39
| | PDF (3642 KB)

In this study, the authors propose a novel structure of high-electron mobility transistor (HEMT) with significantly improved performance. The novelty of the proposed HEMT is the realisation of two parallel induced electron layers under the source and drain electrode, one in the form of two-dimensional (2D) electron gas (2DEG) and the other in the form of charge plasma electron gas (CPEG). The prop... View full abstract»

• Charge sharing write driver and half-$V_{{rm DD}}$VDD pre-charge 8T SRAM with virtual ground for low-power write and read operation

Publication Year: 2018, Page(s):94 - 98
| | PDF (3034 KB)

A novel write bitline (BL) charge sharing write driver (CSWD) and a half-VDD read BL (RBL) pre-charge scheme is presented for a single-ended 8T static random access memory (SRAM). Before write enable (WE) signal assertion, CSWD equalises the write BLs by allowing their charge sharing. Both write BLs are equalised at the middle value of supply voltage using leakage current compensation b... View full abstract»

• Is graphene a good transparent electrode for photovoltaics and display applications?

Publication Year: 2015, Page(s):403 - 412
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The current standard material used for transparent electrodes in displays, touch screens and solar cells is indium tin oxide (ITO) which has low sheet resistance (10 Ω/□), high optical transmission in the visible wavelength (85%) and does not suffer of optical haze. However, ITO is mechanically rigid and incompatible with future demands for flexible applications. Graphene materials s... View full abstract»

• Ultra-stable, low-noise two-stage current source concept for electronics and laser applications

Publication Year: 2017, Page(s):613 - 617
| | PDF (3123 KB)

This study presents a two-stage current source concept which features low-current noise, excellent drift and stability for higher operating currents. Generally, it is much easier to obtain higher stability and lower-noise parameters for small operating currents rather than large ones. This fact was used within this concept, where a precise low-current source (the second stage) corrects the fluctua... View full abstract»

• Xampling: Analog to digital at sub-Nyquist rates

Publication Year: 2011, Page(s):8 - 20
Cited by:  Papers (118)  |  Patents (1)
| | PDF (1056 KB)

The authors present a sub-Nyquist analog-to-digital converter of wideband inputs. The circuit realises the recently proposed modulated wideband converter, which is a flexible platform for sampling signals according to their actual bandwidth occupation. The theoretical work enables, for example, a sub-Nyquist wideband communication receiver, which has no prior information on the transmitter carrier... View full abstract»

• Performance enhancement of a VCO using symbolic modelling and optimisation

Publication Year: 2018, Page(s):196 - 202
| | PDF (4034 KB)

This study proposed an application of symbolic technique on the characterisation of a ring voltage controlled oscillator (VCO) for optimum performance. Here nullor-based symbolic noise modelling and analysis of the CMOS ring VCO is carried out. Circuit equations are processed through modelling of all the metal-oxide-semiconductor field-effect transistors with their nullor equivalent. The closed-fo... View full abstract»

• Thermal image processing for real-time non-contact respiration rate monitoring

Publication Year: 2017, Page(s):142 - 148
| | PDF (444 KB)

A real-time thermal imaging based, non-contact respiration rate monitoring method was developed. It measured the respiration related skin surface temperature changes under the tip of the nose. Facial tracking was required as head movements caused the face to appear in different locations in the recorded images over time. The algorithm detected the tip of the nose and then, a region just under it w... View full abstract»

• Analysis, design and implementation of a zero voltage switching two-switch CCM flyback converter

Publication Year: 2016, Page(s):20 - 28
Cited by:  Papers (1)
| | PDF (769 KB)

This study presents a two-switch continuous conduction mode pulse width modulation flyback converter that employs an LC snubber circuit. The snubber circuit is used to achieve zero voltage switching (ZVS) operation for the main switches during the turn-off transition and soft switching for power diodes. With the proposed LC snubber, the magnetic energy in the transformer leakage inductance can be ... View full abstract»

• Locking range enhancement of divide-by-two injection locked frequency divider using phase shift technique

Publication Year: 2017, Page(s):452 - 456
| | PDF (1806 KB)

This study presents the new locking range enhancement technique in divide-by-two injection locked frequency divider using a phase shifter circuit. The proposed divide-by-two phase shifter injection locking frequency divider (ILFD) is based on complementary metal-oxide-semiconductor (CMOS) cross-coupled oscillator with dual-resonance fourth-order LC-tank that is designed and simulated in 0.18 ... View full abstract»

• Design of rectenna series-association circuits for radio frequency energy harvesting in CMOS FD-SOI 28 nm

Publication Year: 2018, Page(s):40 - 49
| | PDF (8248 KB)

Series-connected rectenna associations are proposed to improve the harvesting performance of conventional rectenna circuits by recovering power from different directions. With an available input power of -20 dBm, post-layout simulations evaluated the total output power of four series-connected rectennas designed in Complementary Metal Oxide Semiconductor Fully Depleted Silicon On Insulator (CMOS F... View full abstract»

• RC oscillators based on high-Q frequency-selecting network

Publication Year: 2018, Page(s):82 - 87
| | PDF (1995 KB)

In this study, a traditional voltage-mode oscillator consisting of a high-Q band-pass filter and a voltage amplifier is transformed into a current-mode oscillator employing a trans-conductance amplifier. Furthermore, a current-mode quadrature oscillator with a high-Q band-pass filter and second generation current-controlled conveyors (CCCIIs) is presented. Since the loop of the oscil... View full abstract»

• Full-custom hardware implementation of point multiplication on binary Edwards curves for application-specific integrated circuit elliptic curve cryptosystem applications

Publication Year: 2017, Page(s):568 - 578
| | PDF (6541 KB)

This study presents an efficient and high-speed very large-scale integration implementation of point multiplication on binary Edwards curves over binary finite field GF(2m) with Gaussian normal basis representation. The proposed implementation is a low-cost structure constructed by one digit-serial multiplier. In the proposed scheduling of point multiplication, the field multiplier is b... View full abstract»

• Low-power 10-bit 100 MS/s pipelined ADC in digital CMOS technology

Publication Year: 2017, Page(s):589 - 596
| | PDF (5142 KB)

A 10-bit pipelined analogue-to-digital converter (ADC) at a sampling rate of 100 MS/s utilising only metal-oxide-semiconductor (MOS) transistors is presented and designed in 1.8 V 0.18 μm standard digital complementary MOS (CMOS) n-well technology. The internal gain of value 2 of the intermediate stages is achieved by using a charge-pump-based concept that avoids the use of power-are... View full abstract»

• Adaptive $g_{m3}$gm3 cancellation linearisation and its application to wide-tunable Gm-C filter design

Publication Year: 2017, Page(s):478 - 486
| | PDF (4349 KB)

This paper presents an adaptive gm3 cancellation for linearisation of operational transconductance amplifier (OTA) and its application to design of a wide tunable Gm-C filter. gm3 cancellation through paralleling triode- and subthreshold-mode transconductors makes good linearisation, but only in a limited range of tuning voltage. An auxiliary circuit is employed... View full abstract»

• Dual frequency MEMS resonator through mixed electrical and mechanical coupling scheme

Publication Year: 2018, Page(s):88 - 93
| | PDF (3053 KB)

Miniaturised transceivers are essential in multiband wireless communication systems for higher data rates and low power consumption. Microelectromechanical system (MEMS) resonator filters are actively considered for deployment in transceivers for radio frequency and intermediate frequency (IF) signal filter and oscillator applications. In this study, the authors propose dual frequency capacitive t... View full abstract»

• Low-power and high-speed 13T SRAM cell using FinFETs

Publication Year: 2017, Page(s):250 - 255
| | PDF (4683 KB)

Fin field-effect transistors (FinFETs) are replacing the traditional planar metal-oxide-semiconductor FETs (MOSFETs) because of superior capability in controlling short channel effects, leakage current, propagation delay, and power dissipation. Planar MOSFETs face the problem of process variability but the FinFETs mitigate the device-performance variability due to number of dopant ions. This work ... View full abstract»

• Multiple memristor series–parallel connections with use in synaptic circuit design

Publication Year: 2017, Page(s):123 - 134
| | PDF (974 KB)

With the increase of research interest on memristors, various single or multiple memristor configurations have been integrated with advanced complementary metal-oxide-semiconducor technology, which promises efficient implementations of synaptic connections in neuromorphic computing systems, or computing elements in signal processing systems. In this study, multiple memristors, both in series and p... View full abstract»

• Review on system development in eddy current testing and technique for defect classification and characterization

Publication Year: 2017, Page(s):330 - 343
| | PDF (7952 KB)

Eddy current testing (ECT) is one of the non-destructive evaluation techniques widely used, especially in oil and gas industries. It characterized noisy data to the less-than-perfect detection and as an indication of serious false alarm problem. However, not many researchers have described in detail the intelligent ECT crack detection system. This paper introduces a review of ECT technique and fac... View full abstract»

• Method for designing ternary adder cells based on CNFETs

Publication Year: 2017, Page(s):465 - 470
| | PDF (2821 KB)

Recently multiple valued logic has attracted the attention of digital system designers. Scalable threshold voltage values of carbon nanotube field-effect transistors (CNFETs) can easily be utilised for multiple-Vt circuit designs. In this study, a novel energy-efficient method for designing one-digit adder is proposed. The suggested design employ ternary multiplexers to select successor and predec... View full abstract»

• NeuroMonitor: a low-power, wireless, wearable EEG device with DRL-less AFE

Publication Year: 2017, Page(s):471 - 477
| | PDF (4214 KB)

Electroencephalography (EEG) is an effective tool to non-invasively capture brain responses. Traditional EEG analogue front end (AFE) requires a driven right leg (DRL) circuit that restricts the number of channels of the device. The authors are proposing a new DRL-less' AFE design, and have developed a wearable EEG device (NeuroMonitor), which is small, low-power, wireless, and battery operated. ... View full abstract»

• Theory on negative time-delay looped system

Publication Year: 2018, Page(s):175 - 181
| | PDF (2875 KB)

An innovative theory on the looped system generating negative time delay is presented. Both the direct and delayed feedback loop topologies of this system essentially consist of an independent-frequency gain and time-delay block. It is shown theoretically that for suitable parameters the system can generate a negative time delay by virtue of a negative group delay (NGD). Analytical expressions rev... View full abstract»

• Systematic design approach for a gain boosted telescopic OTA with cross-coupled capacitor

Publication Year: 2017, Page(s):225 - 231
| | PDF (2402 KB)

A symbolic analysis is presented to study a gain-boosted telescopic operational transconductance amplifier (OTA) with cross-coupled capacitor (positive feedback) across an auxiliary op-amp. The effects of positive feedback capacitor (PFC) on the pole-zero doublet introduced by the auxiliary op-amp are explored using analytical techniques and simulations. A complete transfer function of the OTA wit... View full abstract»

• Dual-band RFID tag antenna based on the Hilbert-curve fractal for HF and UHF applications

Publication Year: 2016, Page(s):140 - 146
Cited by:  Papers (1)
| | PDF (900 KB)

A novel single-radiator card-type tag is proposed which is constructed using a series Hilbert-curve loop and matched stub for high frequency (HF)/ultra high frequency (UHF) dual-band radio frequency identification (RFID) positioning applications. This is achieved by merging the series Hilbert-curve for implementing the HF coil antenna, and square loop structure for implementing the UHF antenna to ... View full abstract»

• Self-compensation scheme for truncation error in fixed width multipliers

Publication Year: 2018, Page(s):55 - 62
| | PDF (4568 KB)

A novel scheme to design the hardware for error compensation function which self-compensates the truncation error of fixed width multiplier is presented. The proposed method statistically correlates the compensating carries in the truncated part with the carries generated at the truncation boundary in the non-truncated part. The method also utilises the selective dominant carry compensation for co... View full abstract»

• VLSI Architecture of Full-Search Variable-Block-Size Motion Estimation for HEVC Video Encoding

Publication Year: 2017, Page(s):543 - 548
| | PDF (1986 KB)

Motion estimation (ME) is the most computationally intensive task in video encoding. This study proposes a full-search variable-block-size ME for the high-efficiency video coding or H.265 specification. The proposed method reduces memory requirements to a large extent by following a Morton order for data reading and a sum of absolute differences reuse strategy. The data bandwidth demand is also di... View full abstract»

• Carbon nanotube FET-based low-delay and low-power multi-digit adder designs

Publication Year: 2017, Page(s):352 - 364
| | PDF (3778 KB)

Several field-effect transistor (FET)-based device technologies are emerging as powerful alternatives to the classical metal oxide semiconductor FET (MOSFET) for computing applications. The focus of this study is on arithmetic circuit design in carbon nanotube FET (CNTFET) technology. In particular, the authors develop low-delay and low-power multi-ternary digit CNTFET-based adder designs. The pro... View full abstract»

• High-performance VLSI architectures for M-PSK modems

Publication Year: 2017, Page(s):166 - 172
| | PDF (578 KB)

M-PSK (phase shift keying) modulation schemes are used in many high-speed applications like satellite communication, as they are more bandwidth and power efficient compared with other schemes. This study presents very large scale integrated circuits (VLSI) architectures for modulators and demodulators of quadrature phase shift keying (QPSK), 8PSK and 16PSK systems, based on the principle of direct... View full abstract»

• Reversible logic-based image steganography using quantum dot cellular automata for secure nanocommunication

Publication Year: 2017, Page(s):58 - 67
| | PDF (1535 KB)

This study introduces a novel architecture for image steganography using reversible logic based on quantum dot cellular automata (QCA). Feynman gate is used to achieve the reversible encoder and decoder for image steganography. A Nanocommunication circuit for image steganography is shown using proposed encoder/decoder circuit. The proposed QCA circuits have lower quantum cost than traditional desi... View full abstract»

• Start-up circuit with low minimum operating power for microwatt energy harvesters

Publication Year: 2011, Page(s):267 - 274
Cited by:  Papers (11)
| | PDF (771 KB)

Remote sensors powered by energy harvesting need to restart successfully after long periods of no available energy, during which all stored energy may have been depleted. This start-up is affected by known phenomena such as lock-up and voltage collapse`. In this study, the authors address these phenomena in the context of energy harvesting where the energy required for a sense and transmit cycl... View full abstract»

• Current and voltage transfer function filters using a single active device

Publication Year: 2010, Page(s):78 - 86
Cited by:  Papers (5)
| | PDF (616 KB)

In this study, current and voltage transfer function filters using single active component, namely, current backward transconductance amplifier (CBTA) are presented. The proposed structures are a single-input three outputs (SITO) current-transfer function filter, a single-input four-output (SIFO) voltage transfer function filter and three-input single-output (TISO) voltage transfer function filter... View full abstract»

• Test and study on sensitivity of electronic circuit in low-voltage release to voltage sags

Publication Year: 2017, Page(s):529 - 534
| | PDF (3137 KB)

This study focuses on sensitivity of electronic circuit in low-voltage release to voltage sags based on a large-scale test results. Although studies about ride-through capability of some electronic devices during voltage sags have been carried out, there is few research available on sensitivity of electronic circuit in low-voltage release to voltage sags. Operation principle and working states of ... View full abstract»

• Design and simulation of a high-gain organic operational amplifier for use in quantification of cholesterol in low-cost point-of-care devices

Publication Year: 2017, Page(s):504 - 511
| | PDF (3726 KB)

This paper presents circuit design and simulations of a high gain organic Op-Amp, for use in quantification of real cholesterol, in the range of 1-9 mM. A 7-stage inverter chain is added onto the design so as to enhance the amplifier gain. The circuit adapts p-channel transistors only (PMOS) design architecture with saturated loads, simulated on a conventional platform, using appropriate OTFT mode... View full abstract»

• 15-year educational experience on autonomous electronic information devices by flipped classroom and try-by-yourself methods

Publication Year: 2017, Page(s):321 - 329
| | PDF (4593 KB)

Since 2001, the departments of Electrical and Electronics and Information and Communication Electronics Engineering of Faculty of Engineering, the University of Tokyo (UTokyo) have jointly given a lecture on autonomous electronic information devices for undergraduate students. According to the on-line questionnaire, 80% of students in 2010-2012 replied that the lecture was useful for their future ... View full abstract»

• Double gate symmetric tunnel FET: investigation and analysis

Publication Year: 2017, Page(s):365 - 370
| | PDF (3333 KB)

In this work, using calibrated 2D simulations, the authors first demonstrate that the OFF-state current and subthreshold swing (SS) are significantly high for the double gate Ge source/drain symmetric p-n-p tunnel field effect transistor (TFET) with a silicon channel without n+ pockets at the source- and drain-channel interfaces. They further establish that using $n^{+}$n+ pockets at th... View full abstract»

Aims & Scope

IET Circuits, Devices & Systems covers the following topics:

Circuit theory and design, circuit analysis and simulation, computer aided design; filters (analogue and switched capacitor); circuit implementations, cells and architectures for integration including VLSI; testability, fault tolerant design, minimisation of circuits and CAD for VLSI; novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs, device and process characterisation, device parameter extraction schemes; mathematics of circuits and systems theory; test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers.

Full Aims & Scope

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