# IEEE Transactions on Components, Packaging and Manufacturing Technology

Includes the top 50 most frequently accessed documents for this publication according to the usage statistics for the month of

• ### 3-D Printed Metal-Pipe Rectangular Waveguides

Publication Year: 2015, Page(s):1339 - 1349
Cited by:  Papers (110)
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This paper first reviews manufacturing technologies for realizing air-filled metal-pipe rectangular waveguides (MPRWGs) and 3-D printing for microwave and millimeter-wave applications. Then, 3-D printed MPRWGs are investigated in detail. Two very different 3-D printing technologies have been considered: low-cost lower-resolution fused deposition modeling for microwave applications and higher-cost ... View full abstract»

• ### Flexible Hybrid Electronics Technology Using Die-First FOWLP for High-Performance and Scalable Heterogeneous System Integration

Publication Year: 2018, Page(s):1738 - 1746
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A technological platform is established for scalable flexible hybrid electronics based on a novel fan-out wafer-level packaging (FOWLP) methodology. Small dielets are embedded in flexible substrates we call FlexTrate. These dielets can be interconnected through high-density wirings formed in wafer-level processing. We demonstrate homogeneous integration of 625 (25 by 25) 1-mm2Si dielets... View full abstract»

• ### Aerosol-Printed Highly Conductive Ag Transmission Lines for Flexible Electronic Devices

Publication Year: 2018, Page(s):1838 - 1844
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We studied aerosol jet printing on flexible substrates for wearable and flexible electronic devices. First, we investigated the electrical conductivity of aerosol jet printed silver layers at different temperatures. An electrical conductivity up to 60% of bulk Ag was measured after sintering at 140 °C on a hot plate. Higher conductivities became possible with higher sinter temperatures. The printe... View full abstract»

• ### Zero-Gap Waveguide: A Parallel Plate Waveguide With Flexible Mechanical Assembly for mm-Wave Antenna Applications

Publication Year: 2018, Page(s):2052 - 2059
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A new gap waveguide concept is presented, where the air gap between the perfect electric conductor and artificial magnetic conductor (AMC) parallel plates of a conventional gap waveguide structure has been reduced to almost zero. When the air gap is reduced, the periodic metal pin layer (which emulates the AMC characteristics) may come in contact with the top metal layer. A statistical analysis of... View full abstract»

• ### High-Frequency Scalable Electrical Model and Analysis of a Through Silicon Via (TSV)

Publication Year: 2011, Page(s):181 - 195
Cited by:  Papers (232)  |  Patents (2)
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We propose a high-frequency scalable electrical model of a through silicon via (TSV). The proposed model includes not only the TSV, but also the bump and the redistribution layer (RDL), which are additional components when using TSVs for 3-D integrated circuit (IC) design. The proposed model is developed with analytic <i>RLGC</i> equations derived from the physical configuration. Each ... View full abstract»

• ### A Low-Cost and High-Gain 60-GHz Differential Phased Array Antenna in PCB Process

Publication Year: 2018, Page(s):1281 - 1291
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A broadband, low-cost, high-gain, multilayer differential antenna without air cavity is proposed for the 60-GHz phased array system. By using the standard low-cost printed circuit board process, a 60-GHz phased array antenna element and a 16-element phased array antenna prototype are implemented. To improve the bandwidth and antenna gain, a superstrate and a float rectangular ring are designed. Th... View full abstract»

• ### Inkjet Printing of Wideband Stacked Microstrip Patch Array Antenna on Ultrathin Flexible Substrates

Publication Year: 2018, Page(s):1695 - 1701
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This paper presents a bandwidth-enhanced, low-cost, compact, inkjet-printed multilayer microstrip fractal patch antenna for integration into flexible and conformal devices. The antenna consists of two layers of patches, with the first layer inkjet-printed directly on a 0.125-mm (only 0.005 of the operating wavelength) Kapton polyimide substrate. On top of it, a 0.12-mm-thick SU-8 polymer is covere... View full abstract»

• ### Die Attach Materials for High Temperature Applications: A Review

Publication Year: 2011, Page(s):457 - 478
Cited by:  Papers (175)
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The need for high power density and high temperature capabilities in today's electronic devices continues to grow. More robust devices with reliable and stable functioning capabilities are needed, for example in aerospace and automotive industries as well as sensor technology. These devices need to perform under extreme temperature conditions, and not show any deterioration in terms of switching s... View full abstract»

• ### Signal Integrity Design and Analysis of Differential High-Speed Serial Links in Silicon Interposer With Through-Silicon Via

Publication Year: 2019, Page(s):107 - 121
Cited by:  Papers (1)
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In this paper, we, for the first time, designed and analyzed differential high-speed serial links of the silicon interposer including differential through-silicon-via (TSV) channels for a high-bandwidth memory (HBM) graphic module. The meshed ground plane and various parameters were considered in designing the silicon interposer. In addition, superior designs were proposed to improve signal integr... View full abstract»

• ### 3-D Printing and CNC Machining Technologies for Exploration of Circularly Polarized Patch Antenna with Enhanced Gain

Publication Year: 2019, Page(s): 1
| | PDF (1044 KB)

This paper presents a gain-enhanced circularly polarized (CP) patch antenna, where 3-D printing and computer numerical control (CNC) machining technologies are employed for the fabrication of its dielectric and metal parts, respectively. In order to assemble the whole structure effectively and accurately, a hybrid strategy and pin-loaded example are here proposed to deal with the detached dielectr... View full abstract»

• ### Fan-Out Wafer-Level Packaging for Heterogeneous Integration

Publication Year: 2018, Page(s):1544 - 1560
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The design, materials, process, fabrication, and reliability of a heterogeneous integration of four chips and four capacitors by a fan-out wafer-level packaging (FOWLP) method are investigated in this paper. Emphasis is placed on the application of a new assembly process for fabricating the redistribution layers of the FOWLP. Reliability assessments, such as the thermal cycling and drop test, are ... View full abstract»

• ### A Filtering Dual-Polarized Antenna Subarray Targeting for Base Stations in Millimeter-Wave 5G Wireless Communications

Publication Year: 2017, Page(s):964 - 973
Cited by:  Papers (16)
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A 2×2 dual-polarized antenna subarray with filtering responses is proposed in this paper. This antenna subarray is a multilayered 3-D geometry, including a dual-path 1× 4 feeding network and four cavity-backed slot antennas. The isolation performance between two input ports is greatly improved by a novel method, which only needs to modify several vias in a square resonator. Cavities in the feeding... View full abstract»

• ### Novel Solution for High-Temperature Dielectric Application to Encapsulate High-Voltage Power Semiconductor Devices

Publication Year: 2019, Page(s):3 - 9
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Traditional semiconductor packaging techniques and materials have been working well for conventional Si devices, which usually operate at temperatures up to 175 °C. As the operating temperature increases, these techniques exhibit failures such as bulk flows, volume shrinkage, brittleness and subsequent cracking, and deterioration of dielectric strength. For the new wide-bandgap power devices, whic... View full abstract»

• ### Multilayer Balanced-to-Unbalanced Power Divider With Wideband Transmission Characteristic and Common-Mode Suppression

Publication Year: 2019, Page(s):72 - 79
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This paper presents a wideband multilayer balanced-to-unbalanced (BTUB) power divider consisting of three metallic layers and two substrate layers with inherent common-mode (CM) suppression. With very simple structure, the working mechanism of the proposed power divider is investigated through even- and odd-mode equivalent circuit analysis, and the designed procedure is also summarized. For demons... View full abstract»

• ### Signal Integrity Design and Analysis of Silicon Interposer for GPU-Memory Channels in High-Bandwidth Memory Interface

Publication Year: 2018, Page(s):1658 - 1671
Cited by:  Papers (4)
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In this paper, for the first time, we designed and analyzed channels between a graphic processing unit and memory in a silicon interposer for a 3-D stacked high bandwidth memory (HBM). We thoroughly analyzed and verified the electrical characteristics of the silicon interposer considering various design parameters, such as the channel width and space, redistribution layer via, and under bump metal... View full abstract»

• ### Chip-First Fan-Out Panel-Level Packaging for Heterogeneous Integration

Publication Year: 2018, Page(s):1561 - 1572
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The design, materials, process, fabrication, and reliability of a heterogeneous integration of four chips by a fan-out panel-level packaging (FOPLP) method are investigated in this paper. Emphasis is placed on the application of a special assembly process called uni-substrate-integrated package for fabricating the redistribution layers (RDLs) of the FOPLP. The Ajinomoto build-up film is used as th... View full abstract»

• ### The Effect of the Thermal Mechanical Properties of Nonconductive Films on the Thermal Cycle Reliability of 40- $\mu$ m Fine Pitch Cu-Pillar/Ni/SnAg Microbump Flip-Chip Assembly

Publication Year: 2019, Page(s):10 - 17
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Nonconductive films (NCFs) have been introduced for 3-D through-silicon via chip stacking interconnection using reliable fine pitch Cu-pillar/Ni/SnAg microbumps. In this paper, four NCF materials with various elastic modulus and coefficient of thermal expansion (CTE) values were used to investigate the effect of the thermomechanical properties of the NCFs on the thermal cycle reliability of fine p... View full abstract»

• ### Demonstration of RF and Microwave Passive Circuits Through 3-D Printing and Selective Metalization

Publication Year: 2017, Page(s):463 - 471
Cited by:  Papers (21)
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The ultimate goal of this paper is to print radio frequency (RF) and microwave structures using a 3-D platform and to pattern metal films on nonplanar structures. To overcome substrate losses, air core substrates that can readily be printed are utilized. To meet the challenge of patterning conductive layers on complex or nonplanar printed structures, two novel self-aligning patterning processes ar... View full abstract»

• ### Warpage Measurements and Characterizations of Fan-Out Wafer-Level Packaging With Large Chips and Multiple Redistributed Layers

Publication Year: 2018, Page(s):1729 - 1737
| | PDF (4182 KB) | HTML

In this paper, the warpages of a chip-first and die face-up fan-out wafer-level packaging (FOWLP) with a very large silicon chip (10 mm × 10 mm × 0.15 mm) and three redistributed layers are measured and characterized. Emphasis is placed on the measurement and 3-D finite-element simulation of the warpages during the FOWLP fabrication processes, especially for: 1) right after postmold cure; 2) right... View full abstract»

• ### Packaging Solution for a Millimeter-Wave System-on-Chip Radar

Publication Year: 2018, Page(s):73 - 81
Cited by:  Papers (1)
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In this paper, a packaging solution for millimeter-wave system-on-chip (SoC) radio transceivers is presented. The on-chip antennas are realized as primary radiators of an integrated lens antenna which offer high bandwidth and high efficiency. The package concept includes a high permittivity silicon lens which serves additionally as heat sink and a quad flat no-lead package which is mountable on a ... View full abstract»

• ### Stress Analysis and Optimization of a Flip Chip on Flex Electronic Packaging Method for Functional Electronic Textiles

Publication Year: 2018, Page(s):186 - 194
Cited by:  Papers (2)
| | PDF (2778 KB) | HTML

A method for packaging integrated circuit silicon die in thin flexible circuits has been investigated that enables circuits to be subsequently integrated within textile yarns. This paper presents an investigation into the required materials and component dimensions in order to maximize the reliability of the packaging method. Two die sizes of 3.5 mm × 8 mm × 0.53 mm and 2 mm × 2 mm × 0.1 mm have b... View full abstract»

• ### Broadband Microwave Frequency Characterization of 3-D Printed Materials

Publication Year: 2013, Page(s):2147 - 2155
Cited by:  Papers (76)
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3-D printing allows increased design flexibility in the fabrication of microwave circuits and devices and is reaching a level of maturity that allows for functional parts. Little is known about the RF and microwave properties of the standard materials that have been developed for 3-D printing. This paper measures a wide variety of materials over a broad spectrum of frequencies from 1 MHz to 10 GHz... View full abstract»

• ### A Scalable and Multidirectional Rectenna System for RF Energy Harvesting

Publication Year: 2018, Page(s):2060 - 2072
| | PDF (3188 KB) | HTML

A rectenna system having multidirectional receiving capability and scalable antenna gain is presented for radio frequency (RF) energy harvesting. The technique of ray tracing was implemented to evaluate RF power collected by antennas with different half-power beam widths. The results indicate that different radiation features are suited to distinct scenarios. This further indicates that a scalable... View full abstract»

• ### 3-D Printing of Conformal Antennas for Diversity Wrist Worn Applications

Publication Year: 2018, Page(s):2227 - 2235
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This paper presents for the first time the application of 3-D printing techniques for the development of conformal antennas for diversity wrist worn wireless communications. Three processes are described with the common challenge of depositing the metallic layers of the antennas on a bracelet fabricated using fuse filament fabrication. The first is a multistep process that combines adding a layer ... View full abstract»

• ### Novel RDL Design of Wafer-Level Packaging for Signal/Power Integrity in LPDDR4 Application

Publication Year: 2018, Page(s):1431 - 1439
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The emerging wafer-level packaging (WLP) technology suffers from serious signal integrity (SI) and power integrity (PI) issues due to its redistribution layer (RDL). There exhibit serious parasitic effects by the high-density RDL traces and less flexibility of decoupling capacitors, so the robust power distribution network is critical to design. This paper proposed a novel two-layered RDL design i... View full abstract»

## Aims & Scope

IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging.

Full Aims & Scope

Managing Editor
Ravi Mahajan
Intel