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Volume 34 Issue 2 • Mar.-Apr. 2014
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Hot Chips and Other Themes
Publication Year: 2014, Page(s):2 - 3
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Hot Chips 25
Publication Year: 2014, Page(s):4 - 5
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Haswell: The Fourth-Generation Intel Core Processor
Per Hammarlund ; Alberto J. Martinez ; Atiq A. Bajwa ; David L. Hill ; Erik Hallnor ; Hong Jiang ; Martin Dixon ; Michael Derr ; Mikal Hunsaker ; Rajesh Kumar ; Randy B. Osborne ; Ravi Rajwar ; Ronak Singhal ; Reynold D'Sa ; Robert Chappell ; Shiv Kaushik ; Srinivas Chennupaty ; Stephan Jourdan ; Steve Gunther ; Tom Piazza ; Ted BurtonPublication Year: 2014, Page(s):6 - 20
Cited by: Papers (68)Haswell, Intel's fourth-generation core processor architecture, delivers a range of client parts, a converged core for the client and server, and technologies used across many products. It uses an optimized version of Intel 22-nm process technology. Haswell provides enhancements in power-performance efficiency, power management, form factor and cost, core and uncore microarchitecture, and the core... View full abstract»
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Kabini: An AMD Accelerated Processing Unit System on A Chip
Publication Year: 2014, Page(s):22 - 33
Cited by: Papers (5)The AMD accelerated processing unit (APU) code-named "Kabini" integrates a quad-core CPU and a fully featured GPU. It is the first APU generation to incorporate a complete system-on-a-chip (SoC) IP to provide power efficiency and a small footprint. The device family includes the ultra-low-power optimized SoC codenamed "Temash," which is targeted for tablet and two-in-one detachable PC use. Kabini ... View full abstract»
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Hexagon DSP: An Architecture Optimized for Mobile Multimedia and Communications
Lucian Codrescu ; Willie Anderson ; Suresh Venkumanhanti ; Mao Zeng ; Erich Plondke ; Chris Koob ; Ajay Ingle ; Charles Tabony ; Rick MaulePublication Year: 2014, Page(s):34 - 43
Cited by: Papers (18)Heterogeneous computing is essential for mobile products to meet power and performance targets. The Qualcomm Hexagon DSP, now in its fifth generation, is used for both modem processing and multimedia acceleration. By offloading multimedia tasks such as voice, audio, sensor, and image processing from the CPU to the DSP, Hexagon achieves significant power savings. Hexagon features a unique architect... View full abstract»
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The Xbox One System on a Chip and Kinect Sensor
Publication Year: 2014, Page(s):44 - 53
Cited by: Papers (24)The system on a chip (SoC) at the heart of the Xbox One entertainment console is one of the largest consumer designs to date, with five billion transistors. The Xbox One Kinect image sensor uses time-of-flight technology to provide high-resolution, low-latency, lighting-independent 3D image sensing. Together, Kinect and the SoC provide unique voice and gesture interaction with high-performance gam... View full abstract»
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Process and Circuit Optimization for Power Reduction Using DDC Transistors
Publication Year: 2014, Page(s):54 - 62
Cited by: Papers (1)The Deeply Depleted Channel (DDC) transistor architecture offers 2 to 3 times improvement in body coefficient and 60 percent improvement in local mismatch in 55-nm technology, extending design techniques such as body biasing with voltage scaling to more recent technology nodes. This article presents a body bias architecture for adaptive correction of manufacturing variation, with less than 0.5 per... View full abstract»
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AbstractAims & Scope
IEEE Micro addresses users and designers of microprocessors and microprocessor systems, including managers, engineers, consultants, educators, and students involved with computers and peripherals, components and subassemblies, communications, instrumentation and control equipment, and guidance systems.
Meet Our Editors
Editor-in-Chief
Erik R. Altman
School of Electrical and Computer Engineering
IBM T.J. Watson Research Center