IEEE ASSP Magazine

Volume 5 Issue 4 • Oct. 1988

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  • Programmable DSP architectures. I

    Publication Year: 1988, Page(s):4 - 19
    Cited by:  Papers (82)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (6343 KB)

    The architectural features of single-chip programmable digital signal processors (DSPs) are explored. The focus is on the most basic such feature, the integration of a hardware multiplier/accumulator into the data path, and a more subtle feature, the use of several (up to six) independent memory banks. These features are studied in terms of the performance benefit and the impact on the user. Repre... View full abstract»

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This Magazine ceased production in 1990. The current retitled publication is IEEE Signal Processing Magazine.

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