# IEEE Transactions on Electron Devices

## Filter Results

Displaying Results 1 - 25 of 45

Publication Year: 2012, Page(s):C1 - 2
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2012, Page(s): C2
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• ### Change of Editor-in-Chief

Publication Year: 2012, Page(s): 3
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• ### Changes to the Editorial Board

Publication Year: 2012, Page(s): 4
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• ### Floating-Gate Corner-Enhanced Poly-to-Poly Tunneling in Split-Gate Flash Memory Cells

Publication Year: 2012, Page(s):5 - 11
Cited by:  Papers (25)
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The poly-to-poly tunneling characteristics in the third-generation SuperFlash memory cell have been analyzed. It has been demonstrated that, even without a sharp floating-gate (FG) tip, the cell still demonstrates the main features of the erase process from previous SuperFlash generations, namely, corner (tip)-enhanced tunneling, asymmetry of the tunneling voltage in forward and reverse directions... View full abstract»

• ### Low-Resistance Electrical Contact to Carbon Nanotubes With Graphitic Interfacial Layer

Publication Year: 2012, Page(s):12 - 19
Cited by:  Papers (70)  |  Patents (4)
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Carbon nanotubes (CNTs) are promising candidates for transistors and interconnects for nanoelectronic circuits. Although CNTs intrinsically have excellent electrical conductivity, the large contact resistance at the interface between CNT and metal hinders its practical application. Here, we show that electrical contact to the CNT is substantially improved using a graphitic interfacial layer cataly... View full abstract»

• ### Comparison of SOS MOSFET's Equivalent Circuit Parameters Extracted From $LCR$ Meter and VNA Measurement

Publication Year: 2012, Page(s):20 - 25
Cited by:  Papers (3)
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In this paper, we critically compare two techniques for the parametrization of silicon-on-sapphire MOSFETs' high-frequency small-signal equivalent circuit and discuss the scalability of high-frequency equivalent circuit parameters. We demonstrate that the same values of the high-frequency circuit elements are obtained from both the vector network analyzer and the low-frequency LCR measurements. We... View full abstract»

• ### One-Dimensional Physical Model to Predict the Internal Quantum Efficiency of Si-Based LEDs

Publication Year: 2012, Page(s):26 - 34
Cited by:  Papers (4)
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A simple analytical model for p-i-n light-emitting diodes is presented to give insight into the device physics. The 1-D model describes the dc electrical characteristics and internal quantum efficiency (ηIQE) as a function of the applied bias and is in good agreement with TCAD simulations. An optimization scheme, based on the same model, shows improved ηIQE for ... View full abstract»

• ### Three-Dimensional nand Flash Architecture Design Based on Single-Crystalline STacked ARray

Publication Year: 2012, Page(s):35 - 45
Cited by:  Papers (29)  |  Patents (87)
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Various critical issues related with 3-D stacked nand Flash memory are examined in this paper. Our single-crystalline STacked ARray (STAR) has many advantages such as better scalability, possibility of single-crystal channel, less sensitivity to 3-D interference, stable virtual source/drain characteristic, and more extendability over other stacked structures. With STAR, we proposed a unit 3-D stru... View full abstract»

• ### An Explicit Analytic Compact Model for Nanocrystalline Zinc Oxide Thin-Film Transistors

Publication Year: 2012, Page(s):46 - 50
Cited by:  Papers (7)
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A new explicit model for long-channel nanocrystalline zinc oxide thin-film transistors is presented. The proposed equation is fully explicit by virtue of its use of the Lambert function. Consequently, the drain current can be directly calculated without the need of numerical iteration or approximations. Additionally, the proposed equation is analytically differentiable, allowing the straightforwar... View full abstract»

• ### Graphene Nanoribbon Spin Interconnects for Nonlocal Spin-Torque Circuits: Comparison of Performance and Energy Per Bit With CMOS Interconnects

Publication Year: 2012, Page(s):51 - 59
Cited by:  Papers (6)
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Solid-state devices based on utilizing the electron spin for storing and manipulating information may pave the way for next-generation computers. In this paper, the performance and the energy dissipation of graphene spin interconnects in a nonlocal spin-torque (NLST) circuit are compared against those of the CMOS circuit at the end of the silicon technology roadmap (technology year 2020). The inte... View full abstract»

• ### Generalization of the Concept of Equivalent Thickness and Capacitance to Multigate MOSFETs Modeling

Publication Year: 2012, Page(s):60 - 71
Cited by:  Papers (21)
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In this letter, we propose to introduce the notion of equivalent capacitance and to generalize the so-called equivalent-thickness concept to model arbitrary shapes of lightly doped nonplanar multigate MOSFETs, without the need to introduce any unphysical parameter. These definitions, which merely map a multigate geometry into the symmetric double-gate (DG) MOSFET topology, have been validated by e... View full abstract»

• ### Layout-Dependent Strain Optimization for p-Channel Trigate Transistors

Publication Year: 2012, Page(s):72 - 78
Cited by:  Papers (9)
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In this paper, we investigate the optimization of device layout and embedded source/drain (eS/D) shape profile for strain engineered 22-nm node Si and SiGe p-channel trigate field-effect transistors by finite-element method simulations. A nested trigate layout with dummy gates is found to retain the maximum channel stress for all three conduction planes. The tradeoff between achievable mobility en... View full abstract»

• ### Compact Modeling of Quasi-Ballistic Silicon Nanowire MOSFETs

Publication Year: 2012, Page(s):79 - 86
Cited by:  Papers (16)
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A compact model for the quasi-ballistic silicon nanowire MOSFET was developed by supplementing the ballistic framework previously disclosed by us with an original carrier-scattering model. The scattering model considers elastic scattering and optical phonon emission, which is the dominant route of energy relaxation in the device. The quasi-ballistic electric current showed a remarkable decrease co... View full abstract»

• ### Temperature Compensation of Silicon Resonators via Degenerate Doping

Publication Year: 2012, Page(s):87 - 93
Cited by:  Papers (30)  |  Patents (1)
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This paper demonstrates the dependence of temperature coefficient of frequency (TCF) of silicon micromechanical resonators on charge carrier concentration. TCF compensation is demonstrated by degenerate doping of silicon bulk acoustic resonators (SiBARs) using both boron and aluminum dopants. The native TCF of -33×ppm/°C for silicon resistivity of >; 103 �... View full abstract»

• ### Surface-Potential-Based Drain Current Model of Polysilicon TFTs With Gaussian and Exponential DOS Distribution

Publication Year: 2012, Page(s):94 - 100
Cited by:  Papers (8)
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An explicit approximation for surface potential as a function of terminal voltages is developed for partially depleted polysilicon thin-film transistors. The resulting model has taken both Gaussian deep states and exponential tail states into account, which provides a complete modeling for surface potential. Furthermore, a drain current model based on terms of surface potential is proposed. Surfac... View full abstract»

• ### A Tunnel Diode Body Contact Structure for High-Performance SOI MOSFETs

Publication Year: 2012, Page(s):101 - 107
Cited by:  Papers (15)
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A tunnel diode body contact (TDBC) silicon-on-insulator (SOI) MOSFET structure without floating-body effects (FBEs) is proposed and successfully demonstrated. The key idea of the proposed structure is that a tunnel diode is embedded in the source region, so that the accumulated carriers can be released through tunneling. In an n-MOSFET, a heavily doped p+ layer is introduced beneath the... View full abstract»

• ### Understanding the Failure Mechanisms of Protection Diodes During System Level ESD: Toward Repetitive Stresses Robustness

Publication Year: 2012, Page(s):108 - 113
Cited by:  Papers (7)
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In electronic systems, the ever-increasing level of integration is paced by component scaling. Consequently, system-level protection improvements in electrostatic discharge (ESD) reliability during a device's lifetime are mandatory. To this end, we have investigated bidirectional system-level ESD protection diodes that have been subjected to repetitive human metal model stresses. Our goal was to d... View full abstract»

• ### High-Performance Junction Barrier Schottky Rectifier With Optimized Structure

Publication Year: 2012, Page(s):114 - 120
Cited by:  Papers (3)
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Junction barrier Schottky (JBS) rectifiers with p-well on 4H-SiC for improving the electrical performance are proposed. Compared with the common JBS rectifier, the devices show an increasing breakdown voltage due to a uniform electric field. Forward and reverse characteristics have been verified at room and elevated temperatures. As a result, the breakdown voltage of 1.9 kV was obtained for the JB... View full abstract»

• ### AlGaN/GaN Metal–Oxide–Semiconductor High-Electron Mobility Transistor With Liquid-Phase-Deposited Barium-Doped $hbox{TiO}_{2}$ as a Gate Dielectric

Publication Year: 2012, Page(s):121 - 127
Cited by:  Papers (14)  |  Patents (2)
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Barium-doped TiO2 films deposited on GaN layers at low temperature through a simple liquid phase deposition method is investigated. The use as a gate dielectric in AlGaN/GaN metal-oxide-semiconductor high-electron mobility transistors (MOSHEMTs) is also demonstrated. The electrical characteristics of the MOS structure on n-doped GaN show that the leakage current density is about 5.09 &#... View full abstract»

• ### 50-nm Asymmetrically Recessed Metamorphic High-Electron Mobility Transistors With Reduced Source–Drain Spacing: Performance Enhancement and Tradeoffs

Publication Year: 2012, Page(s):128 - 138
Cited by:  Papers (1)
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Whereas gate-length reduction has served as the major driving force to enhance the performance of GaAs- and InP-based high-electron mobility transistors (HEMTs) over the past three decades, the limitation of this approach begins to emerge. In this paper, we present a systematic evaluation of the impact of greatly reduced source-drain spacing on the performance of 50-nm asymmetrically recessed meta... View full abstract»

• ### Physical and Electrical Analysis of Post-$hbox{HfO}_{2}$ Fluorine Plasma Treatment for the Improvement of $hbox{In}_{0.53}hbox{Ga}_{0.47}hbox{As}$ MOSFETs' Performance

Publication Year: 2012, Page(s):139 - 144
Cited by:  Papers (9)
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Notable improvements in the HfO2/In0.53 Ga0.47As gate stack have been achieved by a post- HfO2 fluorine plasma treatment, including excellent interface quality of low equivalent oxide thickness HfO2 (1.4 nm) directly on In0.53Ga0.47As without using an interface passivation layer, ~ 5× reduction in interface trap de... View full abstract»

• ### One-Time-Programmable Memory in LTPS TFT Technology With Metal-Induced Lateral Crystallization

Publication Year: 2012, Page(s):145 - 150
Cited by:  Papers (3)
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A simple and reliable one-time-programmable (OTP) memory for low-temperature polysilicon thin-film-transistor technology with metal-induced lateral crystallization (MILC) is developed. The antifuse memory element is based on the breakdown of thin silicon dioxide deposited on smooth surface achieved by MILC. The effects of crystallization process and electrode configurations on the memory character... View full abstract»

• ### Positive Gate-Bias Temperature Stability of RF-Sputtered $hbox{Mg}_{0.05}hbox{Zn}_{0.95}hbox{O}$ Active-Layer Thin-Film Transistors

Publication Year: 2012, Page(s):151 - 158
Cited by:  Papers (19)
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This paper investigates the positive gate-bias temperature stability of RF-sputtered bottom-gate Mg0.05Zn0.95O active-layer thin-film transistors (TFTs) annealed at 200 °C for 5 h and 350 °C for 30 min. Although the TFT devices initially exhibited similar electrical characteristics, the TFTs annealed at 350 °C demonstrated stability characteristics superi... View full abstract»

• ### Doping-Free Inverted Top-Emitting Organic Light-Emitting Diodes With High Power Efficiency and Near-Ideal Emission Characteristics

Publication Year: 2012, Page(s):159 - 166
Cited by:  Papers (10)
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Inverted top-emitting organic light-emitting diodes (ITOLEDs) with high power efficiency and near-ideal emission characteristics are demonstrated by using the combination of the following: 1) an electron-injection layer composed of Cs2CO3, which lowers the turn-on voltage; 2) an electron-transporting layer with optimal electron mobility, which enhances the electron current an... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy