IBM Journal of Research and Development

We examine the representation of geometric tolerances in solid-geometric models from the perspective of two classes of functional requirements. The first class deals with positioning of parts with respect to one another in an assembly, and the second with maintaining material bulk in critical portions of parts. Both are directly relatable to the geometry of the parts. Through examples, we demonstr... View full abstract»

In a companion paper, we examined the representation of geometric tolerances in solid models from the perspective of certain functional requirements. We showed that assembly and material bulk requirements can be specified as virtual boundary requirements (VBRs). Here, we study the related issue of deriving equivalent alternative specifications. Specifically, we first explore the reasons for conver... View full abstract»

This paper describes a set of optimized subroutines for use in solving sparse, symmetric, positive definite linear systems of equations using iterative algorithms. The set has been included in the Engineering and Scientific Subroutine Library (ESSL) for the IBM 3090 Vector Facility (VF). The subroutines are based on the conjugate-gradient method, preconditioned by the diagonal or by an incomplete ... View full abstract»

After a brief review of the means for characterizing lattice gases using cellular automata rules, we discuss the implementation of the rules for simulating hydrodynamic phenomena which can be described by the Navier-Stokes equations. Special emphasis is placed on data-mapping strategies and implementation through the use of the high speed and large memory resources offered by vector multiprocessor... View full abstract»

A new method for generating weighted random patterns for testing LSSD logic chips and modules is described. Advantages in using weighted random versus either deterministic or random test patterns are discussed. An algorithm for calculating an initial set of input-weighting factors and a procedure for obtaining complete stuck-fault coverage are presented. View full abstract»

Fault-tolerance techniques and redundant circuits have been used extensively to increase the manufacturing yield and productivity of integrated-circuit chips. Presented here is a review of relevant statistical models which have been used to account for the effects on manufacturing yield of the large-area defect and fault clusters commonly encountered during chip fabrication. A statistical criterio... View full abstract»

In previous treatments of the manufacturing yield of fault-tolerant integrated-circuit chips, fault clusters were either assumed to be absent or relatively large in area. Presented here is a treatment in which the occurrence of small-area fault clusters is assumed. Four different types of statistical distributions are considered, and a criterion is described for determining whether small-area faul... View full abstract»

A process is described for translating the specifications of an object and its interrelationship with another object into a three-dimensional computer graphic and then into a photo-polymer hologram. The capability to translate specifications about objects and their interrelationships into accurate holograms without having to create either a physical model or the manufactured object itself opens ex... View full abstract»

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