# IEEE Transactions on Electronic Computers

## Filter Results

Displaying Results 1 - 25 of 47
• ### [Front cover]

Publication Year: 1965, Page(s): c1
| PDF (480 KB)
• ### IEEE Computer Group

Publication Year: 1965, Page(s): nil1
| PDF (135 KB)
• ### [Breaker page]

Publication Year: 1965, Page(s): nil1
| PDF (135 KB)
• ### New Editor-in-Chief

Publication Year: 1965, Page(s): 533
| PDF (932 KB)
• ### A Reduction Technique for Prime Implicant Tables

Publication Year: 1965, Page(s):535 - 541
Cited by:  Papers (24)
| | PDF (1241 KB)

Solving prime implicant tables is greatly facilitated by reduction techniques such as row dominance, column dominance, and essential row selection. This paper presents a new reduction technique which is operable on any otherwise irreducible table having a column covered by exactly two rows. View full abstract»

• ### Average Values of Quantities Appearing in Multiple Output Boolean Minimization

Publication Year: 1965, Page(s):542 - 552
Cited by:  Papers (7)
| | PDF (1240 KB)

In connection with the problem of two-level minimization of systems of Boolean functions, formulas are obtained for the following statistical quantities: average number of k cubes, prime k cubes, and essential k cubes of a system of Boolean functions. The parameters appearing in the formulas are the number of variables, the number of functions of the system, and the number of one'' vertices of e... View full abstract»

• ### Synthesis of Minimal Threshold Logic Networks

Publication Year: 1965, Page(s):552 - 560
Cited by:  Papers (31)  |  Patents (4)
| | PDF (1550 KB)

An algorithm is developed for synthesizing networks which realize Boolean switching functions through the use of a minimum number of threshold logic elements. A switching function is represented by a matrix and the algorithm is based on the principle that the removal of the positive linear dependences from the rows of this matrix results in a linearly separable function. The positive linear depend... View full abstract»

• ### On Information Lossless Automata of Finite Order

Publication Year: 1965, Page(s):561 - 569
Cited by:  Papers (28)
| | PDF (1379 KB)

A coding graph is a model which contains all the types of finite automata and codes as special cases. A test for information losslessness and for information losslessness of finite order of a coding graph is described. Efficient methods of computation are given which make the calculation simple and mechanizable. The application of the tests to finite deterministic automata is discussed and a metho... View full abstract»

• ### Design of an Accumulator for a General Purpose Computer

Publication Year: 1965, Page(s):570 - 574
Cited by:  Papers (3)
| | PDF (799 KB)

This paper describes the logical design of an accumulator register for a general purpose digital computer. The only logic gates used are NOR gates and inverter gates and the sole storage device is a gated clocked flip-flop which takes the value on a single input line when the gate line is high. The accumulator register operates in conjunction with another register called the memory exchange regist... View full abstract»

• ### Transmission Capacity of Disk Storage Systems with Concurrent Arm Positioning

Publication Year: 1965, Page(s):575 - 582
Cited by:  Papers (3)
| | PDF (1400 KB)

An organization for a disk storage system oriented toward multicomputer and shared computer applications is described, and a study is made of its effectiveness in accessing data. The disk file incorporates an independently positioned arm for accessing each disk, and the capability for concurrently controlling several positioners. Also, multiple data transmission channels can be provided between th... View full abstract»

• ### The Scaling of Digital Differential Analyzers

Publication Year: 1965, Page(s):583 - 590
Cited by:  Papers (2)
| | PDF (1091 KB)

A method for computing the scales needed for programming a digital differential analyzer (DDA) is developed. DDA program (interconnection) maps containing integrators and servos are considered. The scales must satisfy equilibrium,'' topological,'' and boundary'' constraints. These constraints are shown to be equivalent to a set of linear inequalities. Linear programming techniques are used t... View full abstract»

• ### Worst-Case Considerations in Designing Logical Circuits

Publication Year: 1965, Page(s):590 - 599
| | PDF (1211 KB)

A method of design is presented for logical circuits, starting from worst-case considerations. The method represents an approach to dc optimization. Special attention is paid to temperature and tolerance problems in monolithic integrated circuits. In the worst-case design procedure outlined, the requirements for obtaining a properly functioning circuit are taken as the point of departure. This res... View full abstract»

• ### A Destructive-Readout Associative Memory

Publication Year: 1965, Page(s):600 - 605
Cited by:  Papers (4)
| | PDF (1143 KB)

The organization of an associative memory which makes use of conventional destructive-readout magnetic elements is presented. The associative memory described is word-organized; an example is an array of memory elements of 64 bits by 1024 bits. The memory is both location-addressable and content-addressable, and capable of bit-parallel search. A unique feature is its two-dimensional read/write cap... View full abstract»

• ### Delay Approximations for Correlation Measurements Using Analog Computers

Publication Year: 1965, Page(s):606 - 617
Cited by:  Papers (4)
| | PDF (1388 KB)

In the most direct method for measuring correlation functions with an analog computer a delay must be simulated. Since a lumped parameter system is used, we can only hope to approximate this delay. We intentionally exclude such storage systems as magnetic tapes because of their cost, and confine ourselves to the use of commonly available analog computer components. Extensive work has been carried ... View full abstract»

• ### Experimental Study of a New Method of Time Delay for Analog Computers

Publication Year: 1965, Page(s):617 - 623
Cited by:  Papers (8)
| | PDF (1521 KB)

A new method for obtaining pure delay of voltage waveforms on the analog computer is discussed. This method, which is based upon frequency-domain sampling in combination with a feedforward-feedback technique, is capable of producing relatively long delays. The theory underlying the method has been previously presented. In this paper experimental aspects are described in detail. Particular emphasis... View full abstract»

• ### An Algorithm for Threshold Element Analysis

Publication Year: 1965, Page(s):623 - 625
| | PDF (545 KB)

A majority or threshold element is a device with a finite number of inputs and a single output. The output, Fn is a Boolean function of the n binary valued variables (x1, x2, ..., xn) applied to the inputs. The analysis of a threshold element is the determination of the output Boolean function, Fn when the input variables and their multiplicit... View full abstract»

• ### On the Dual-Monotonicity of Threshold Functions

Publication Year: 1965, Page(s):625 - 627
Cited by:  Papers (1)
| | PDF (604 KB)

A necessary condition for a threshold function in terms of comparability was first reported by Paull and McCluskey [4] who have established a chain of conditions later called 1-monotonicity, 2-monotonicity, and k-monotonicity, in general. Each of these conditions entails its predecessors, and is stricter than them; the union of this denumerable set of conditions is called complete monotonicity by ... View full abstract»

• ### Matrix Criteria for Arbitrary Reliability in Iterated Neural Nets

Publication Year: 1965, Page(s):627 - 629
Cited by:  Papers (3)
| | PDF (641 KB)

In a previous paper by this author, the problem of achieving arbitrary reliability for combinatorial nets from arbitrarily unreliable elements was reduced to the study of the convergence properties of an associated polynomial system. In this paper simple criteria which specify the convergence of such a system to a nodal fixed point are obtained from known results in matrix theory. (Convergence to ... View full abstract»

• ### Some Problems in Relay Circuit Design

Publication Year: 1965, Page(s):630 - 634
| | PDF (946 KB)

In the design of sequential relay circuits one often has to consider the circuit as a part of a larger system, and one must take into account the nature of the inputs to the circuit. Frequently, the inputs are two-terminal contact networks with one terminal grounded; such inputs will be called simple. This paper examines the formal design techniques as applied to circuits with simple inputs. It is... View full abstract»

• ### Comments on the Minimization of Stochastic Machines

Publication Year: 1965, Page(s):634 - 637
Cited by:  Papers (16)
| | PDF (757 KB)

In a recent note by Bacon [1], a new result about the minimization of stochastic finite state machines has been proven. Extending the theory developed by Carlyle [2], he shows that all minimal-state forms of equivalent machines are state equivalent, and they all have the same number of states. He also describes a necessary and sufficient condition for a machine to be minimal. View full abstract»

• ### "Light-Pen"' Facilities for Direct View Storage Tubes-An Economical Solution for Multiple Man-Machine Communication

Publication Year: 1965, Page(s):637 - 639
Cited by:  Papers (2)
| | PDF (555 KB)

Techniques are presented which enable conventional "light-pen" tracking and pointing functions to be extended to the direct view storage tube (DVST). The schemes eliminate the high data transfer rates or considerable buffer storage required even for static displays when short persistence cathode ray tubes (CRTs) are used. Two solutions, a "quadruple photo-sensor pen" and the "potentiometer pen" (a... View full abstract»

• ### A Shiftrix for High-Speed Multiplication

Publication Year: 1965, Page(s):639 - 643
Cited by:  Patents (1)
| | PDF (920 KB)

The concept of the shiftrix matrix is due to Dr. G. Estrin [1] of the UCLA Department of Engineering. In broad terms the shiftrix is a device for speeding up the multiplication operation in computers by making use of complete parallelism in the shifting operation to reduce the total shifting time to a negligible value. A similar device to accomplish the same purpose has been devised by Richards [2... View full abstract»

• ### Figure of Merit of Electronic Switching Devices

Publication Year: 1965, Page(s):643 - 646
| | PDF (604 KB)

To specify the amplifying properties of various active electronic devices the gain-bandwidth product GNB is commonly used. The aim of this paper is to show that for active electronic (not electromagnetic) devices working in switching circuits, another figure of merit (analogous to the reciprocal of the gain-bandwidth product) could be derived from a simple model of an electronic switch. View full abstract»

• ### A Functional Counter

Publication Year: 1965, Page(s):646 - 647
Cited by:  Papers (1)
| | PDF (239 KB)

First Page of the Article
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• ### Comment on NOR-NAND Synthesis

Publication Year: 1965, Page(s): 648
Cited by:  Papers (1)
| | PDF (721 KB)

First Page of the Article
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## Aims & Scope

This Transactions ceased publication in 1967. The current retitled publication is

Full Aims & Scope