IEEE Transactions on Circuits and Systems

Computer simulations using SPICE establish the feasibility of implementing a highly pipelined high-speed FIR digital filter using Multiple-Valued Logic (MVL) Read-Only Memories (ROM's) to implement Residue Number System (RNS) Arithmetic in VLSI technology. A single VLSI chip can be used to convert from 8-bit binary to a 16-bit RNS with one additional chip to convert back. The basic approach propos... View full abstract»

The well-known Richards' Theorem of the continuous-time filter theory is reformulated in the digital domain in a convenient manner, leading to a simple derivation of cascaded lattice digital filter structures, realizing lossless bounded transfer functions. The theorem is also extended to the matrix case, leading to a derivation ofm-inputp-output cascaded lattice filter struct... View full abstract»

A new technique is introduced for synthesizing low roundoff noise second-order state-space structures. The technique yields structures which require the same number of multiplies as the canonical direct form structure. Thusnth-order realizations composed of these subfilters require only about 2nmultiplies. The number of additions required is also low, ranging from 2n View full abstract»

In this paper, expressions are derived for the mean square error in modified radix-2 FFT algorithms. To reduce the mean square error at the output of a special purpose, high-speed low-order(n {leq} 32)FFT processor implemented in fixed-point arithmetic, a modified FFT architecture is considered in which an extra bit is added to the register wordlength to prevent overflow. In this way, t... View full abstract»

In using the original 1-D to 2-D McClellan transformcos{omega}= F(cos{omega}_1,cos{omega}_2), scaling of the transform parameters [4,5] is necessary to guarantee that|F| leq 1. In a recent letter [7], we have presented extremely simple formulas for the scaling factors, then proposed a modified transform which not only is scaling-free but also contains one fewer parameter than... View full abstract»

A network, or a graph, can be described by a set of nodes or vertices and a set of links or edges. Letuvbe two vertices andxybe a link in a given undirected network. We show that a shortest path betweenuandvthroughxycan be found by transforming the problem into a minimum cost network flow problem. It may be noted that when the network is direc... View full abstract»

Discrete median filters are a special class of ranked-order digital filters used for smoothing signals. In this paper, the analog median filter is defined and proposed for analysis of the standard discrete median filter in cases with a large sample size or when the associated statistics would be simpler in the continuum. Discrete filters are shown to be a subclass of analog filters. Also, an equiv... View full abstract»

A method is presented which permits the first-approximation exact analysis of the dynamical stability of fundamental-mode injectionsynchronized oscillators (FISO's) characterized by a quasi-sinusoidal quasi-static behavior. By combining small parameter and stroboscopic transformation techniques, the phase-lock stability investigation of an nth-order system is reduced to the simple Hurwitz test on ... View full abstract»

Two-dimensional (2-D) block processing technique for linear filtering of digital images is introduced. New 2-D block structures are derived for 2-D recursive digital filters realized by difference equations and state-space formulations. Several special cases have also been considered and the relevant 2-D block structures are given. The computational costs of different implementation techniques emp... View full abstract»

A novel method of analog-to-digital (A/D) conversion utilizing a Slope Adaptive Delta Modulation approach which we will call Instantly Adaptive Delta Modulation (IADM), is described. This new system provides higher quality processable code than present modulators yet requires substantially reduced sampling rates. It displays a wide tolerance for variations in its component values and operates undi... View full abstract»

The time-domain sensitivity analysis of a dynamic sense amplifier (DSA) is presented, based on an adjoint system solution. An admissible range of parameter variations for correct latching is computed from the sensitivity analysis. It has been shown that the sense amplifier sensitivity to the load capacitance and the gate to source capacitances of the latching transistors is dependent on the slope ... View full abstract»

The relation between the probability of false alarm (PFA) and threshold of a square law detector-logarithmic amplifier (SLD-LA) is investigated. An analytical result for determining the threshold setting at the LA output for a desired PFA is obtained for a narrow bandlimited Gaussian noise input, and is verified experimentally. View full abstract»

The gain and bandwidth characteristics of a neutralized bipolar differential pair are analyzed, and results are compared with measurements performed on three integrated circuit test cells. A simple two-port model of the neutralized pair is derived through application of signal flow and dominant pole theories. This model is fully capable of predicting gain and 3-dB bandwidth as a function of a bias... View full abstract»

A detailed analysis of the dependence of bipolar transistor noise figure on signal frequency is undertaken. Theoretical results, which are validated by experiment, show that the net effective emitter resistance contributes significantly to low-frequency noise figure degradation. This resistance also reduces the corner frequency above which the noise figure degrades substantially with signal freque... View full abstract»