# 2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM)

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Displaying Results 1 - 25 of 93
• ### 2018 The 3rd International Conference on Integrated Circuits and Microsystems

Publication Year: 2018, Page(s): 1
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• ### 2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems

Publication Year: 2018, Page(s): 1
| PDF (86 KB)
• ### 2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems (ICICM) [Copyright notice]

Publication Year: 2018, Page(s): 1
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• ### 2018 IEEE 3rd International Conference on Integrated Circuits and Microsystems

Publication Year: 2018, Page(s):1 - 8
| PDF (205 KB)
• ### Preface

Publication Year: 2018, Page(s): 1
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• ### Committees

Publication Year: 2018, Page(s):1 - 3
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• ### Author Index

Publication Year: 2018, Page(s):1 - 4
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• ### A Ring Ocillator Based Reliability Monitor

Publication Year: 2018, Page(s):1 - 4
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Due to the technology nodes further scale, variabilities continue to be a challenge for IC design. The variability is mainly classified as IR-drop, temperature change and aging. We mainly discussed the first two parts in this paper. Overheating can damage the chip permanently and excessive IR-Drop can greatly affect voltage sensitive digital blocks. In order to avoid these damages and make better ... View full abstract»

• ### Response Analysis of a 2D MEMS Electromagnetically Driven Micro-Mirror

Publication Year: 2018, Page(s):5 - 9
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As a MEMS actuator device, the 2D micro-mirror works in two resonant modes to realize biaxial deflection in light detection and ranging (LiDAR) system. By Changing the exit angle of the incident laser, the three-dimensional information of a space object can be received. This paper researches on the response problem of one kind of 2D electromagnetically driven micro-mirror by numerical analysis and... View full abstract»

• ### All-Digital Delta-Sigma TDC with Differential Multipath Pre-Skewed Gated Delay Line Time Integrator

Publication Year: 2018, Page(s):10 - 14
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This paper presents an all-digital 1st-order 1-bit delta-sigma time-to-digital converter ($\Delta \Sigma$ TDC) with a differential multipath pre-skewed bi-directional gated delay line (BDGDL) time integrator. Differential time integration is obtained by performing simultaneous left-shift and right-shift operations of the BDGDL. Pre-skewing is used to lower the per-stage delay and skew e... View full abstract»

• ### Architectures and Design Techniques of Digital Time Interpolators

Publication Year: 2018, Page(s):15 - 20
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This paper provides an in-depth review of the principle, architecture, and design techniques of digital time interpolators. An assessment of the advantages and drawbacks of analog time interpolators are presented first. It is followed with a comprehensive examination of reported digital time interpolators including gated inverter time interpolators, harmonic-rejection time interpolators, voltage-d... View full abstract»

• ### Failure Analysis on the Abnormal Leakage of the Transistors at Lower Temperatures

Publication Year: 2018, Page(s):21 - 24
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Failure location and mechanism analysis of a type of transistors failure are presented in this work. The failure phenomenon of abnormal leakage appeared in the collector terminal at low temperatures test. A series of methods including residual gas analysis (RGA), decapping internal inspection, isolation exclusion test and verification test are adopted to analyze the cause of the failure. Based on ... View full abstract»

• ### A CMOS Laser Driver with Configurable Optical Power for Time-of-Flight 3D-Sensing

Publication Year: 2018, Page(s):25 - 28
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A fast-pulse, configurable output optical power and high-pulse frequency integrated CMOS laser driver for 3D sensing is presented in this paper. The architecture of the proposed laser driver uses a DC-coupled structure, while risetime improvement is achieved by adding a resistor in parallel with the VCSEL. The proposed integrated laser driver is implemented in a $0.18\mu \text{m}$ CMOS ... View full abstract»

• ### Research and Design of Class D Amplifier at 1 MHz

Publication Year: 2018, Page(s):29 - 32
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This paper is mainly for the study of current mode Class-D(CMCD) power amplifier at 1MHz operating frequency. The article mainly focuses on the influence of the driving circuit of the power MOSFET on the Class-D amplifier at high frequency, the parameter calculation in the power amplifier circuit and the parameters of the output transformer. The calculations are discussed in three aspects. In addi... View full abstract»

• ### A 1.8V Output RF Energy Harvester at Input Available Power of −20 dBm

Publication Year: 2018, Page(s):33 - 37
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This paper presents a RF energy harvester (RFEH) operating at a frequency of 900 MHz in $0.18-1\mu\text{m}$ CMOS technology. It mainly consists of an RF rectifier, a low dropout voltage regulator (LDO), and a self-starting circuit. A level-l hybrid forward and backward compensation technique is employed for the RF rectifier to lower the equivalent threshold voltage of MOS transistors, w... View full abstract»

• ### A 1-V 90.3-dB DR 100-kHz BW 4th-Order Single Bit Sigma-Delta Modulator in 40-nm CMOS Technology

Publication Year: 2018, Page(s):38 - 41
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A 1-V 4th-order discrete-time single bit sigma-delta modulator over a signal bandwidth of 100 kHz is presented in this paper. The feed forward topology is selected to reduce the voltage swings of the integrators. In addition, a novel two-stage inverter-based amplifier is proposed to improve the DC gain in low voltage environment. To save power consumption, a pure dynamic comparator is employed. De... View full abstract»

• ### Calibration Mechanism for Input/Output Termination Resistance in 28nm CMOS

Publication Year: 2018, Page(s):42 - 46
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This paper presents a method of receiver and transmitter input/output resistance calibration in UMC 28nm CMOS process. Designed and verified in Cadence IC615, the actual calibration resistance of the simulation (approximately 200Ω, which is four times the impedance of the transmission line) with high robustness under all PVT conditions, and the maximum deviation is 0.85%. The proposed calibration ... View full abstract»

• ### A Wide Tuning Range Low $\pmb{K}_{\mathbf{VCO}}$ and Low Phase Noise VCO

Publication Year: 2018, Page(s):47 - 50
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A wide tuning range, low $\pmb{K}_{\mathbf{VCO}}$ and low phase noise VCO is presented in this paper by combining fully differential active inductor (DAI), switched capacitor array and MOS-based variable capacitors. The adoption of the DAI instead of spiral inductor in the LC tank reduces the phase noise of VCO due to high $\pmb{Q}$ value of DAI. The multiple tuning modes by ... View full abstract»

• ### The Design of High Linear Bootstrapped S/H Switch

Publication Year: 2018, Page(s):51 - 55
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Sometimes, the input-port of A/D converter always needs a S/H switch. In Sample state, the S/H switch should always be opening, now voltages between input-port and output-port in S/H switch are always the same. In Hold state, the S/H switch should always be closing, now the voltage of output-port in S/H switch will keep a fixed value, and it will not be changed with the voltage of input-port in S/... View full abstract»

• ### Novel Design of SOI SiGe HBTs with High Johnson's Figure-of-Merit

Publication Year: 2018, Page(s):56 - 59
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A novel design of SOI SiGe HBTs with a buried n+ thin layer and p− doping layer is proposed to improve the product of cutoff frequency and breakdown voltage, which is a vital Johnson's figure of merit (J-FOM) of the device. In this design, the n+ thin layer is used to increase the cutoff frequency and the p− doping layer is adopted to maintain a high bre... View full abstract»

• ### Power Characteristics for the Dual Channel 4H-SiC Metal Semiconductor Field Effect Transistor

Publication Year: 2018, Page(s):60 - 63
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The current and breakdown characteristics of a dual channel 4H-SiC metal semiconductor field effect transistor (4H-SiC MESFET) are studied by using simulation tool ISE-TCAD. The simulated results show that current density of the dual channel structure is much higher than that of the conventional structure at the same gate bias. The breakdown happened in the gate terminal close to the drain and the... View full abstract»

• ### Error Compensation Methods for Laser-Displacement-Sensors Surface Modeling

Publication Year: 2018, Page(s):64 - 68
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Laser displacement sensors (LDSs) have been widely used in surface modeling for their pinpoint accuracy. To match the high accuracy of LDSs, the influence of machinery vibration must be compensated. In this letter, we built a mathematical model of the relative position between LDSs and objects. Based on the model, the Direct Compensation Method and the Curve Fitting Compensation Method were introd... View full abstract»

• ### Research on the Microwave Scattering from Bare Land Based on IEM

Publication Year: 2018, Page(s):69 - 72
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With the development of remote sensing for the land environment, the microwave scattering of bare land attracts more attention. Comparing Gauss rough surface, the surface with exponential correlation function shows better agreement with natural environment. In this paper, the scattering characteristics of rough surface with exponential correlation function are investigated. The monostatic and bist... View full abstract»

• ### Efficient Hihg-Sigma Yield Analysis with Yield Optimization Method for Near-Threshold SRAM Design

Publication Year: 2018, Page(s):73 - 79
| | PDF (456 KB) | HTML

The enhancement of process, the feature size of device becomes smaller, and the deductions of power supply require the design of SRAM should be consummated. For the design of 6-T SRAM, although we have many methods to optimize it in order to overcome lots of challenges. But the smaller feature size and lower power supply will produce a decline in the performance of Static Noise Margin (SNM) and in... View full abstract»

• ### A High-Temperature Model of MOSFET Characteristics in $0.13-\mu \text{m}$ Bulk CMOS

Publication Year: 2018, Page(s):80 - 85
| | PDF (326 KB) | HTML

There is an increasing demand for reliable high-temperature electronics implemented in low-cost bulk CMOS technologies. In this paper, first, a detailed study of high-temperature impairments and reliability issues is presented. An analytical model for high-temperature operation of MOSFET devices in $0.13-\mu \text{m}$ bulk CMOS process is then presented. The proposed large-signal model ... View full abstract»