# IEEE Transactions on Circuits and Systems I: Regular Papers

## Filter Results

Displaying Results 1 - 25 of 34

Publication Year: 2014, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2014, Page(s): C2
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• ### A Band-Reject Nested-PLL Clock Cleaner Using a Tunable MEMS Oscillator

Publication Year: 2014, Page(s):653 - 662
Cited by:  Papers (1)
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This paper presents the Band-Reject Nested-PLL (BRN-PLL) scheme that simultaneously improves filtering of a noisy input signal and relaxes the requirements for the loop bandwidth. As the architecture employs a modified PLL as a divider of another PLL, a stability analysis is presented to demonstrate suitable operation. The BRN-PLL close-to-carrier output noise is dominated by the PFD/CP of the inn... View full abstract»

• ### Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers

Publication Year: 2014, Page(s):663 - 670
Cited by:  Papers (7)
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A high-performance buffer amplifier topology for liquid crystal display drivers is presented. The proposed amplifier achieves fast driving performance and offers a rail-to-rail common-mode input range. Enhanced slewing and settling capabilities are achieved through a novel output stage performing dual-path push-pull operation. No additional biasing network is required to set the quiescent conditio... View full abstract»

• ### A 25-µW All-MOS Potentiostatic Delta-Sigma ADC for Smart Electrochemical Sensors

Publication Year: 2014, Page(s):671 - 679
Cited by:  Papers (11)
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This paper presents a low-power all-MOS delta-sigma ADC specifically optimized for the potentiostatic biasing and amperometric read-out of electrochemical sensors. The proposed architecture reuses the dynamic properties of the sensor itself to implement a continuous-time mixed electrochemical delta-sigma modulator with minimalist analog circuits fully integrable in purely digital CMOS technologies... View full abstract»

• ### A PSRR Enhancing Method for GRO TDC Based Clock Generation Systems

Publication Year: 2014, Page(s):680 - 688
Cited by:  Papers (3)
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This paper discusses a supply noise sensitivity problem of the gated ring oscillator (GRO) based time-to-digital converter (TDC) in all-digital phase-locked loops (ADPLLs) and presents a power supply rejection ratio (PSRR) enhancing method. A replica supply noise monitoring circuit is designed to track supply noise and enable feed-forward error cancellation for high PSRR TDC design. A prototype AD... View full abstract»

• ### Nanopower OTAs With Improved Linearity and Low Input Offset Using Bulk Degeneration

Publication Year: 2014, Page(s):689 - 698
Cited by:  Papers (16)
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In this paper, a study of bulk degeneration in a differential pair to enhance its linear range is initially conducted. A nanopower operational transconductance amplifier (OTA) is then proposed combining both source and bulk degeneration to achieve an increased linear range above 1 V with a power supply ranging from 1.9 V to 5.5 V. The circuit was fabricated in a 0.6 μm technology and measured. Thi... View full abstract»

• ### Design and Analysis of Wide Frequency-Tuning-Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer

Publication Year: 2014, Page(s):699 - 711
Cited by:  Papers (24)
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To provide wide frequency tuning range (FTR) with compact implementation area, a new inductive tuning method is introduced in this paper for CMOS 60 GHz voltage controlled oscillator (VCO). The inductive tuning is based on a switching inductor-loaded transformer by configuring different current return-paths in the secondary coil of the transformer. Different from previous inductive tuning methods,... View full abstract»

• ### Modeling CMOS Ring Oscillator Performanceas a Randomness Source

Publication Year: 2014, Page(s):712 - 724
Cited by:  Papers (11)
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In order to maximize randomness of CMOS Ring Oscillators (RO) used in Random Number Generators (RNG), possibility of weak inversion operation of CMOS transistors is investigated. To predict weak inversion noise performance of RO, phase noise and jitter models of a CMOS RO in weak inversion operating region are obtained. Differential Ring Oscillator (DRO) and Inverter-based Ring Oscillator (IbRO) c... View full abstract»

• ### Regulated Common-Gate Transimpedance Amplifier Designed to Operate With a Silicon <newline/>Photo-Multiplier at the Input

Publication Year: 2014, Page(s):725 - 735
Cited by:  Papers (11)
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A transimpedance amplifier (TIA) in the front-end of a radiation detector is required to convert the current pulse produced by a light-detector to a voltage pulse with amplitude and shape suitable for the subsequent processing. We consider in this paper the specifications of a positron emission tomography (PET) scanner for medical imaging. The conventional approach is to use an avalanche photo-dio... View full abstract»

• ### Universal Set of CMOS Gates for the Synthesis of Multiple Valued Logic Digital Circuits

Publication Year: 2014, Page(s):736 - 749
Cited by:  Papers (5)
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The design of Multiple Valued Logic (MVL) digital circuits is performed by increasing the representation domain from the two level (N=2) switching algebra to N > 2 levels. Universal sets of MVL CMOS gates allow the synthesis and implementation of any MVL digital circuit. The main drawback of this approach is the lack of existing integrated circuits that implement the universal set of MVL gates.... View full abstract»

• ### A 0.07 mm$^2$Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization

Publication Year: 2014, Page(s):750 - 763
Cited by:  Papers (12)
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This paper presents an ultra-low-power radio receiver implemented only with CMOS logic gates used as basic building blocks and proves its operation. The self-timed duty-cycled system is self-synchronized with the input radio signal, runs a noise-robust baseband detection and does not require any reference besides power supply. Based on S-OOK modulation, the 350-450 MHz digital radio RX occupies an... View full abstract»

• ### Improved Filter Bank Approach for the Design of Variable Bandedge and Fractional Delay Filters

Publication Year: 2014, Page(s):764 - 777
Cited by:  Papers (3)
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The paper proposes an optimization technique for the design of variable digital filters with simultaneously tunable bandedge and fractional delay using a fast filter bank (FFB) approach. In the FFB approach, full band signals are split into multibands, and each band is multiplied by a proper phase shift to realize the variable fractional delay. In the proposed technique, in the formulation of the ... View full abstract»

• ### Critical-Path Analysis and Low-Complexity Implementation of the LMS Adaptive Algorithm

Publication Year: 2014, Page(s):778 - 788
Cited by:  Papers (24)
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This paper presents a precise analysis of the critical path of the least-mean-square (LMS) adaptive filter for deriving its architectures for high-speed and low-complexity implementation. It is shown that the direct-form LMS adaptive filter has nearly the same critical path as its transpose-form counterpart, but provides much faster convergence and lower register complexity. From the critical-path... View full abstract»

• ### Elementary Operation Approach to Order<newline/> Reduction for Roesser State-Space <newline/>Model of Multidimensional Systems

Publication Year: 2014, Page(s):789 - 802
Cited by:  Papers (10)
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This paper proposes a new order reduction approach for Roesser state-space model of multidimensional ( n-D) systems based on elementary operations, by inversely applying the basic idea adopted in the new elementary operation approach to the Roesser model realization of n-D systems. It will be shown first that the n-D order reduction problem can be formulated into an elementary operation problem of... View full abstract»

• ### An Easy Pure Algebraic Method for Partial Fraction Expansion of Rational Functions With Multiple High-Order Poles

Publication Year: 2014, Page(s):803 - 810
Cited by:  Papers (2)
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An easy practical algebraic algorithm was proposed for partial expansion of rational functions with multiple high-order poles. The simple recursive implementation of the proposed method involves neither long division nor differentiation and requires only elementary arithmetic operations. It is suitable for computer or hand calculation of partial expansion of both proper and improper functions with... View full abstract»

• ### Cooperative Phenomena in Networks of Oscillators With Non-Identical Interactions and Dynamics

Publication Year: 2014, Page(s):811 - 819
Cited by:  Papers (10)
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The incipience of synchrony in a diverse population of phase oscillators with non-identical interactions is an intriguing phenomenon. We study frequency synchronization of such oscillators composing networks with arbitrary topology in the context of the Kuramoto model and we show that its synchronization manifold is exponentially stable when the coupling has certain properties. Several example sys... View full abstract»

• ### A Multicast Tree Router for Multichip Neuromorphic Systems

Publication Year: 2014, Page(s):820 - 833
Cited by:  Papers (23)
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We present a tree router for multichip systems that guarantees deadlock-free multicast packet routing without dropping packets or restricting their length. Multicast routing is required to efficiently connect massively parallel systems' computational units when each unit is connected to thousands of others residing on multiple chips, which is the case in neuromorphic systems. Our tree router imple... View full abstract»

• ### Synchronization of Nonlinear Oscillators in an LTI Electrical Power Network

Publication Year: 2014, Page(s):834 - 844
Cited by:  Papers (37)  |  Patents (1)
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Sufficient conditions are derived for the global asymptotic synchronization of a class of identical nonlinear oscillators coupled through a linear time-invariant network. In particular, we focus on systems where oscillators are connected to a common node through identical branch impedances. For such networks, it is shown that the synchronization condition is independent of the number of oscillator... View full abstract»

• ### Chaotic Characteristics Analysis and Circuit Implementation for a Fractional-Order System

Publication Year: 2014, Page(s):845 - 853
Cited by:  Papers (24)
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Based on fractional transfer function approximation in frequency domain, the paper firstly discusses the fractional form of a four-wing autonomous integral-order chaotic system, and finds some chaotic attractors in the different orders of the fractional-order system. The chaotic attractors can be found when the order of the fractional-order system is varied from 1.5 to 2.7, especially in the fract... View full abstract»

• ### A Systematic Methodology for Constructing Hyperchaotic Systems With Multiple Positive Lyapunov Exponents and Circuit Implementation

Publication Year: 2014, Page(s):854 - 864
Cited by:  Papers (50)
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This paper aims at developing a systematic methodology for constructing continuous-time autonomous hyperchaotic systems with multiple positive Lyapunov exponents. To overcome the essential difficulty in balancing between local instability and global convergence, this paper initiates a new methodology for designing a dissipative hyperchaotic system with a desired number of positive Lyapunov exponen... View full abstract»

• ### High-Throughput Low-Energy Self-Timed CAM Based on Reordered Overlapped Search Mechanism

Publication Year: 2014, Page(s):865 - 876
Cited by:  Papers (8)
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This paper introduces a reordered overlapped search mechanism for high-throughput low-energy content-addressable memories (CAMs). Most mismatches can be found by searching a few bits of a search word. To lower power dissipation, a word circuit is often divided into two sections that are sequentially searched or even pipelined. Because of this process, most of match lines in the second section are ... View full abstract»

• ### Polar Quantizer for Wireless Receivers: Theory, Analysis, and CMOS Implementation

Publication Year: 2014, Page(s):877 - 887
Cited by:  Papers (10)  |  Patents (1)
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This paper presents the theory and analysis of IF polar receiver (PRX) architecture. By using new quantization techniques in the polar domain, the proposed receiver can boost the signal to quantization noise ratio (SQNR) compared to a traditional rectangular (I/Q) receiver. The proposed PRX is composed of a magnitude and a phase quantizer. The magnitude quantizer is similar to the conventional rec... View full abstract»

• ### Noise and Chaos Contributions in Fast Random Bit Sequence Generated From Broadband Optoelectronic Entropy Sources

Publication Year: 2014, Page(s):888 - 901
Cited by:  Papers (14)
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During the last 4 years, chaotic waveforms for random number generation found a deep interest within the community of analogue broadband chaotic optical systems. Earlier investigations on chaos-based RNG were proposed in the 90s and early 2000, however mainly based on piecewise linear (PL) 1D map, with bit rate determined by analog electronic processing capabilities to provide the PL nonlinear fun... View full abstract»

• ### Direct Antenna Modulation (DAM) for Enhanced Capacity Performance of Near-Field Communication (NFC) Link

Publication Year: 2014, Page(s):902 - 910
Cited by:  Papers (7)
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Shannon's theorem suggests that the capacity of a wireless link is determined by both the power received and the bandwidth of the system. However, in a conventional setup of an inductively coupled near-field communication (NFC) link, there is a trade-off between the power coupled through and the bandwidth. Direct antenna modulation (DAM) is a feasible scheme to mitigate this dilemma. With DAM util... View full abstract»

## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK