IEEE Transactions on Circuits and Systems I: Regular Papers

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Publication Year: 2013, Page(s):C1 - C4
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• IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2013, Page(s): C2
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• Analysis and Optimization of Transformer-Based Power Combining for Back-Off Efficiency Enhancement

Publication Year: 2013, Page(s):825 - 835
Cited by:  Papers (13)
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This paper analyzes the back-off efficiency enhancement characteristics of transformer combined power amplifiers taking into account the amplifier and transformer parasitics. The dynamic power combining properties of different transformer architectures are investigated. The co-optimization of the transformer and the amplifiers is presented for the transformer-based Doherty power amplifier which is... View full abstract»

• 40 nm CMOS Ultra-Low Power Integrated Gas Gauge System for Mobile Phone Applications

Publication Year: 2013, Page(s):836 - 845
Cited by:  Papers (3)
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This paper presents a fully integrated gas gauge system for mobile phone applications. It aims to consume a very small amount of power (less than 5%) compared to the whole system consumption during standby, maintaining a good level of accuracy in measuring battery energy in and out. It does not use any external bulky and expensive components beside the sense resistor and it has been manufactured i... View full abstract»

• Stability in Small Signal Common Base Amplifiers

Publication Year: 2013, Page(s):846 - 855
Cited by:  Papers (2)
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This paper presents an analytical study of parasitic oscillation in video bandwidth common base amplifiers. We develop a series of progressively more complex small signal equivalent circuits based on the hybrid-π model [1], [2]. These circuits are developed such that the effect of each new parasitic element on circuit performance is evident. The conditions required for negative input resistance ar... View full abstract»

• A Time-Domain High-Order MASH$\Delta\Sigma$ADC Using Voltage-Controlled Gated-Ring Oscillator

Publication Year: 2013, Page(s):856 - 866
Cited by:  Papers (15)
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In this paper, a time-domain high-order ΔΣ analog-to-digital converter (ADC) using voltage-controlled gated-ring oscillator (VC-GRO) and time-domain multi-stage-noise-shaping (MASH) is introduced. To implement the high-order noise transfer function (NTF), a voltage-controlled oscillator (VCO) and VC-GRO quantizers are cascaded. Unlike conventional high-order ΔΣ ADC using feedback loop, the propose... View full abstract»

• High-Efficiency Wireless Power Transfer for Biomedical Implants by Optimal Resonant Load Transformation

Publication Year: 2013, Page(s):867 - 874
Cited by:  Papers (117)
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Wireless power transfer provides a safe and robust way for powering biomedical implants, where high efficiency is of great importance. A new wireless power transfer technique using optimal resonant load transformation is presented with significantly improved efficiency at the cost of only one additional chip inductor component. The optimal resonant load condition for the maximized power transfer e... View full abstract»

• Steady-State Oscillations in Resonant Electrostatic Vibration Energy Harvesters

Publication Year: 2013, Page(s):875 - 884
Cited by:  Papers (26)
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In this paper, we present a formal analysis and description of the steady-state behavior of an electrostatic vibration energy harvester operating in constant-charge mode and using different types of electromechanical transducers. The method predicts parameter values required to start oscillations, allows a study of the dynamics of the transient process, and provides a rigorous description of the s... View full abstract»

• Optimal Low Power Complex Filters

Publication Year: 2013, Page(s):885 - 895
Cited by:  Papers (16)  |  Patents (1)
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Realizations of voltage-mode and current-mode complex filters based on transconductance, transresistance, and current amplifiers for intermediate frequency (IF) applications are systematically developed. Various amplifiers are realized utilizing the second generation current conveyor (CCII) to promote comparisons at device levels. The adopted approach shows that the most efficient designs in terms... View full abstract»

• Analysis of Pull-in Range Limit by Charge Pump Mismatch in a Linear Phase-Locked Loop

Publication Year: 2013, Page(s):896 - 907
Cited by:  Papers (7)
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In this paper, we show the relationship between the pull-in range of a linear phase-locked loop (PLL) and the current mismatch of the charge pump that controls the frequency of the oscillator in the PLL. We evaluate the pull-in range of the PLL based on a nonlinear behavioral model of the pull-in process with three types of phase detectors. We introduce the mismatch error to the charge pump curren... View full abstract»

• Die-to-Die Clock Synchronization for 3-D IC Using Dual Locking Mechanism

Publication Year: 2013, Page(s):908 - 917
Cited by:  Papers (7)
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This paper presents a novel die-to-die clock synchronization method that is independent of the inter-die wire delay. Through a 2-Phase All-Digital Delay Locked Loop (2P-DLL) and a Dual Locking Mechanism (DLM), this method can be used to maintain a global clock signal between two dies in a 3-D IC, and thereby enabling the synchronous 3-D IC design methodology. Unlike previous designs, ours does not... View full abstract»

• A Digitally Modulated Class-E Polar Amplifier in 90 nm CMOS

Publication Year: 2013, Page(s):918 - 925
Cited by:  Papers (12)
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In this paper a digital amplitude modulator for a polar transmitter is presented. The instantaneous output power is modulated by adjusting the amplifiers load through a digitally controlled impedance transformation network. The modulator is suited for modulation schemes with moderate peak-to-average power ratio (PAPR), such as π/4 DQPSK. The modulator may also be used for fine gain control in cons... View full abstract»

• On the Fixed-Point Implementation of Fractional-Delay Filters Based on the Farrow Structure

Publication Year: 2013, Page(s):926 - 937
Cited by:  Papers (13)
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In this paper, the fixed-point implementation of adjustable fractional-delay filters using the Farrow structure is considered. Based on the observation that the sub-filters approximate differentiators, closed-form expressions for theL2-norm scaling values at the outputs of each sub-filter as well as at the inputs of each delay multiplier are derived. The scaling values can then b... View full abstract»

• A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory

Publication Year: 2013, Page(s):938 - 950
Cited by:  Papers (7)
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In this paper, we present a reconfigurable SIMT multi-core processor with a shared memory for mobile ray tracing. The proposed processor addresses two issues of SIMT architecture: branch divergence of concurrently executed threads and contention in a shared memory. Performance degradation due to the branch divergence is reduced by dividing a wide SIMT datapath into several narrow SIMT cores that e... View full abstract»

• A 2.63 Mbit/s VLSI Implementation of SISO Arithmetic Decoders for High Performance Joint Source Channel Codes

Publication Year: 2013, Page(s):951 - 964
Cited by:  Papers (5)
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This paper highlights the implementation challenges faced by the current high performing error resilient joint source channel coding (JSCC) techniques based on the concept of soft-input soft-output (SISO) decoding of arithmetic codes (AC). Further, it proposes several efficient algorithmic and a very large scale integration (VLSI) architectural techniques to improve the throughput performance of S... View full abstract»

• Bitline Techniques With Dual Dynamic Nodes for Low-Power Register Files

Publication Year: 2013, Page(s):965 - 974
Cited by:  Papers (3)  |  Patents (1)
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Wide fan-in dynamic multiplexers are one of the critical circuits of read-out paths in high-speed register files. However, these dynamic gates have poor noise immunity, which is aggravated by their wide fan-in structure, and their high switching activity consumes significant power. We present new footer voltage feedforward domino (FVFD) and static-switching pulse domino (SSPD) designs for dynamic ... View full abstract»

• A$0.13~\mu{\rm m}$CMOS Operational Schmitt Trigger R-to-F Converter for Nanogap-Based Nanosensors Read-Out

Publication Year: 2013, Page(s):975 - 988
Cited by:  Papers (18)
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We report design and measurements on a 0.13 μm CMOS Schmitt Trigger-based quasi-digital resistance-to-frequency converter prototype that can be effectively used as a read-out circuit for nanodevice-based sensors. The readout circuit comprises an operational amplifier and an inverting Schmitt Trigger, achieving an hysteresis scaled to 1 mV-order, hence, increasing frequency compared to a standard S... View full abstract»

• Binary Discrete Cosine and Hartley Transforms

Publication Year: 2013, Page(s):989 - 1002
Cited by:  Papers (29)
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In this paper, a systematic method for developing a binary version of a given transform by using the Walsh-Hadamard transform (WHT) is proposed. The resulting transform approximates the underlying transform very well, while maintaining all the advantages and properties of WHT. The method is successfully applied for developing a binary discrete cosine transform (BDCT) and a binary discrete Hartley ... View full abstract»

• Lyapunov Stability and Strong Passivity Analysis for Nonlinear Descriptor Systems

Publication Year: 2013, Page(s):1003 - 1012
Cited by:  Papers (13)
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In this paper, Lyapunov stability and strong passivity are defined for nonlinear descriptor systems. The new concepts facilitate the formulation of the relationship between the stability and passivity of nonlinear descriptor systems. A Lyapunov stability theorem which describes a sufficient condition for the systems to be globally asymptotically stable and of index one is derived. By the Lyapunov ... View full abstract»

• Robust Stabilization Design for Stochastic Partial Differential Systems Under Spatio-temporal Disturbances and Sensor Measurement Noises

Publication Year: 2013, Page(s):1013 - 1026
Cited by:  Papers (5)
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We investigate anH∞robust observer-based stabilization design problem for linear stochastic partial differential systems (LSPDSs) under spatio-temporal disturbances and sensor measurement noises. A general theoreticalH∞robust observer-based stabilization method is introduced at the beginning for LSPDSs under intrinsic fluctuation, external disturbance and sensor... View full abstract»

• One Analog STBC-DCSK Transmission Scheme not Requiring Channel State Information

Publication Year: 2013, Page(s):1027 - 1037
Cited by:  Papers (44)
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Both the inherently wideband differential-chaos-shift-keying (DCSK) modulation and the space-time block code (STBC) are techniques that can mitigate the effect of multipath fading. By applying STBC at the chaotic segment level, a novel analog STBC-DCSK scheme is proposed in this paper. The proposed scheme is a simple configuration that combines the advantages of STBC and chaotic modulation. Due to... View full abstract»

• Fault Detection and Isolation Filters for Three-Phase AC-DC Power Electronics Systems

Publication Year: 2013, Page(s):1038 - 1051
Cited by:  Papers (21)
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This paper develops and experimentally demonstrates a new class of high-fidelity model-based fault detection and isolation filters for three-phase AC-DC power electronics systems. The structure of these filters is similar to that of a piecewise linear observer and in the absence of faults the filter residual converges to zero. On the other hand, whenever a fault occurs, by appropriately choosing t... View full abstract»

• Advanced Control for Very Fast DC-DC Converters Based on Hysteresis of the${C}_{out}$Current

Publication Year: 2013, Page(s):1052 - 1061
Cited by:  Papers (16)
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The bandwidth achievable by using voltage mode control or current mode control in switch-mode power supply is limited by the switching frequency. Fast transient response requires high switching frequency, although lower switching frequencies could be more suitable for higher efficiency. This paper proposes the use of hysteretic control of the output capacitor (Cout) current to improve the d... View full abstract»

• Catastrophic Bifurcation in Three-Phase Voltage-Source Converters

Publication Year: 2013, Page(s):1062 - 1071
Cited by:  Papers (19)
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Active pulse-width-modulated (PWM) voltage rectifiers are commonly used to convert ac power from a three-phase grid to a regulated dc voltage with unity input power factor. The output voltage regulation is normally achieved by an outer voltage feedback loop and a sinusoidal pulse-width-modulated (SPWM) inner current loop. Due to output voltage disturbances, such as those produced by a capacitive l... View full abstract»

• A 0.9-/spl mu/A Quiescent Current Output-Capacitorless LDO Regulator With Adaptive Power Transistors in 65-nm CMOS

Publication Year: 2013, Page(s):1072 - 1081
Cited by:  Papers (56)
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An ultra-low quiescent current output-capacitorless low-dropout (OCL-LDO) regulator with adaptive power transistors technique is presented in this paper. The proposed technique permits the regulator to transform itself between 2-stage and 3-stage cascaded topologies with respective power transistor, depending on the load current condition. As such, it enables the OCL-LDO regulator to achieve ultra... View full abstract»

Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK