# IEEE Transactions on Circuits and Systems I: Regular Papers

## Filter Results

Displaying Results 1 - 25 of 36

Publication Year: 2012, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2012, Page(s): C2
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• ### Device Noise in Continuous-Time Oversampling Converters

Publication Year: 2012, Page(s):1829 - 1840
Cited by:  Papers (4)
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We analyze the in-band thermal noise of continuous-time delta sigma modulators. The manifestation of noise in converters with time-invariant loop filters is straight forward and well known. However, several practically useful modulators, like those with switched-capacitor-resistor (SCR) and return-to-open (RTO) feedback DACs, have a time-varying loop filter. We give a framework for analyzing the n... View full abstract»

• ### Noise Performance of a Regulated Cascode Transimpedance Amplifier for Radiation Detectors

Publication Year: 2012, Page(s):1841 - 1848
Cited by:  Papers (19)  |  Patents (1)
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A low noise transimpedance amplifier (TIA) is used in radiation detectors to transform the current pulse produced by a photo-sensitive device into an output voltage pulse with a specified amplitude and shape. We consider here the specifications of a PET (positron emission tomography) system. We review the traditional approach, feedback TIA, using an operational amplifier with feedback, and we inve... View full abstract»

• ### A Time-Based Technique for Testing LC-Tank Oscillators

Publication Year: 2012, Page(s):1849 - 1859
Cited by:  Papers (2)
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This paper describes a new architecture that explores time-based signal-processing concepts for testing LC-tank radio-frequency (RF) oscillator circuits, and in particular, quadrature oscillators, while relying on low-frequency digital test equipment. The proposed system has two inputs that are two step-like signals with a time separation that is externally controlled. The output of the system is ... View full abstract»

• ### A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator

Publication Year: 2012, Page(s):1860 - 1870
Cited by:  Papers (19)
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A DLL based on a dual edge triggered phase detector (DET-PD) is proposed for a clock generator in low-power systems. The proposed DLL has a faster lock speed with the same loop dynamics compared to the conventional DLL based on a single-edge triggered phase detector (SET-PD). The proposed DET-PD solves the problem of a narrow capture range or low phase detector gain associated with the conventiona... View full abstract»

• ### An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation

Publication Year: 2012, Page(s):1871 - 1879
Cited by:  Papers (16)
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A phase shift technique using capacitive source degeneration (CSD) is presented for LC quadrature voltage-controlled oscillators (QVCO), where capacitively degenerated differential pairs are used to couple the LC tanks to implement a phase-shifted transconductance and negative input resistance to compensate resonator losses, and to minimize the flicker noise contributions. The CSD technique not on... View full abstract»

• ### Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators

Publication Year: 2012, Page(s):1880 - 1893
Cited by:  Papers (24)  |  Patents (2)
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This paper presents a general methodology for compensating LDO regulators which exploits a current amplifier to effectively multiply the Miller capacitor. After a general theoretical analysis that takes into account both the external and internal loop stability, it is examined the feasibility of applying this kind of compensation in different LDO applications, showing the role of the design parame... View full abstract»

• ### Sensitivity Analysis of Continuous-Time$\Delta \Sigma$ADCs to Out-of-Band Blockers in Future SAW-Less Multi-Standard Wireless Receivers

Publication Year: 2012, Page(s):1894 - 1905
Cited by:  Papers (12)
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The increasing demand for integrating multiple wireless services in one multi-standard handset, exemplified by the software-defined radio (SDR) model, calls for digitizing wireless receivers in a quest for flexibility. Radio-frequency (RF) front-end and analog baseband filters need to be exchanged for digital processing at the expense of a highly challenging analog-to-digital converter (ADC) speci... View full abstract»

• ### Analysis and Modeling of Internal State Variables for Dynamic Effects of Nonvolatile Memory Devices

Publication Year: 2012, Page(s):1906 - 1918
Cited by:  Papers (38)
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Hybrid integration of CMOS and nonvolatile memory (NVM) devices has become the foundation for emerging nonvolatile memory-based computing. The primary challenge to validate hybrid memory system with both CMOS and NVM devices is to develop a SPICE-like simulator that can simulate the dynamic behavior accurately and efficiently. Since memristor, spin-transfer-toque magnetic-tunneling-junction (STT-M... View full abstract»

• ### Joint Detection and Decoding for MIMO Systems Using Convolutional Codes: Algorithm and VLSI Architecture

Publication Year: 2012, Page(s):1919 - 1931
Cited by:  Papers (11)
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In this paper, we present a novel approach to perform joint detection and decoding for spatial multiplexing multiple-input multiple-output (MIMO) systems which utilize convolutional codes. The bit error rate (BER) performance of the proposed approach is significantly better than that of systems which utilize separate detection and decoding blocks. Formal algorithms with two possible system setups ... View full abstract»

• ### Healing of DSP Circuits Under Power Bound Using Post-Silicon Operand Bitwidth Truncation

Publication Year: 2012, Page(s):1932 - 1941
Cited by:  Papers (2)
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Increasing device parameter variations in nanometer CMOS technologies cause large spread in circuit parameters such as delay and power, leading to parametric yield loss. For digital signal processing (DSP) hardware, variations in circuit parameters can significantly affect the quality of service (QoS). Existing post-silicon calibration and repair approaches rely on adaptation of circuit operating ... View full abstract»

• ### The Impact of Input-Mismatch on Flying-Adder Direct Period Synthesizer Output Jitter

Publication Year: 2012, Page(s):1942 - 1951
Cited by:  Papers (7)
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Flying-Adder direct period synthesis is an emerging frequency synthesis technique. It is a mixed-signal technology that directly constructs the output clock period based on a multi-inputs reference. Owing to its open loop style and the usage of Time-Average-Frequency, this technique bears two important features: fine frequency resolution and instantaneous response. Although it has been used in com... View full abstract»

• ### Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part I: Addition, Approximate Transcendental Functions, and Log-Domain Operations

Publication Year: 2012, Page(s):1952 - 1965
Cited by:  Papers (8)  |  Patents (1)
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We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the first part of this paper, adders and exponential function modules are presented first and secondly. By utilizing the two modules, several transcendental functions including hyperbolic and logarithmic functions are constructed. The... View full abstract»

• ### Sorter-Based Arithmetic Circuits for Sigma-Delta Domain Signal Processing—Part II: Multiplication and Algebraic Functions

Publication Year: 2012, Page(s):1966 - 1979
Cited by:  Papers (7)  |  Patents (1)
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We construct arithmetic modules for signal processing with sigma-delta modulated signal form which has advantage in signal quality over other pulsed signal forms. In the second part of this paper, multi-input multipliers are presented first. Secondly, dividers and square root function modules with the multiplier on their internal feedback path are constructed. Combined use of the multipliers, divi... View full abstract»

• ### Hardware Reduction in Digital Delta-Sigma Modulators via Bus-Splitting and Error Masking—Part II: Non-Constant Input

Publication Year: 2012, Page(s):1980 - 1991
Cited by:  Papers (9)
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In this two-part paper, a design methodology for hardware reduction in digital delta-sigma modulators (DDSMs) based on bus-splitting and error masking is presented. Part I addresses Multi stAge noise SHaping (MASH) DDSMs with constant inputs; Part II focuses on error feedback modulators (EFMs) with time-varying inputs. In this paper, we address EFMs with DC inputs plus additive input least signifi... View full abstract»

• ### Design Techniques and Architectures for Low-Leakage SRAMs

Publication Year: 2012, Page(s):1992 - 2007
Cited by:  Papers (20)
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In high performance Systems-on-Chip, leakage power consumption has become comparable to the dynamic component, and its relevance increases as technology scales. These trends are even more evident for memory devices, for two main reasons. First, memories have historically been designed with performance as the primary figure of merit; therefore, they are intrinsically non power-efficient structures.... View full abstract»

• ### Ultra-Low Power Hybrid CMOS-Magnetic Logic Architecture

Publication Year: 2012, Page(s):2008 - 2016
Cited by:  Papers (22)
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Dipolar magnetic coupling between single layer nanomagnets is used in nanomagnetic logic (NML). Apart from writing and reading, nanomagnets are also clocked using external magnetic fields generated by current carrying wires. The related current ranges in mA and consumes large power. Also, the fields cannot sharply terminate at boundaries between nanomagnets that are required to be in different clo... View full abstract»

• ### Asymptotic Cramér-Rao Bound for Noise-Compensated Autoregressive Analysis

Publication Year: 2012, Page(s):2017 - 2024
Cited by:  Papers (2)
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Noise-compensated autoregressive (AR) analysis is a problem insufficiently explored with regard to the accuracy of the estimate. This paper studies comprehensively the lower limit of the estimation variance, presenting the asymptotic Cramér-Rao bound (CRB) for Gaussian processes and additive Gaussian noise. This novel result is obtained by using a frequency-domain perspective of the problem as wel... View full abstract»

• ### A SPT Treatment to the Realization of the Sign-LMS Based Adaptive Filters

Publication Year: 2012, Page(s):2025 - 2033
Cited by:  Papers (2)
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The “sum of power of two (SPT)” is an effective format to represent filter coefficients in a digital filter which reduces the complexity of multiplications in the filtering process to just a few shift and add operations. The canonic SPT is a special sparse SPT representation that guarantees presence of at least one zero between every two non-zero SPT digits. In the case of adaptive filters, as the... View full abstract»

• ### Scheduled-Step-Size Affine Projection Algorithm

Publication Year: 2012, Page(s):2034 - 2043
Cited by:  Papers (23)
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An approach for scheduling the step sizes of an adaptive filter using the affine projection algorithm (APA) is proposed so that its mean-square deviation (MSD) learning curve can be guided along a pre-designed trajectory. This approach eliminates the parameter-tuning process and does not require estimating unmeasurable stochastic quantities. Furthermore, a step-size lower bound is derived in rando... View full abstract»

• ### Generalized EEG-Based Drowsiness Prediction System by Using a Self-Organizing Neural Fuzzy System

Publication Year: 2012, Page(s):2044 - 2055
Cited by:  Papers (46)
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A generalized EEG-based Neural Fuzzy system to predict driver's drowsiness was proposed in this study. Driver's drowsy state monitoring system has been implicated as a causal factor for the safety driving issue, especially when the driver fell asleep or distracted in driving. However, the difficulties in developing such a system are lack of significant index for detecting the driver's drowsy state... View full abstract»

• ### Advantages of Geometric Algebra Over Complex Numbers in the Analysis of Networks With Nonsinusoidal Sources and Linear Loads

Publication Year: 2012, Page(s):2056 - 2064
Cited by:  Papers (5)
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An alternative circuit analysis technique is used to study networks with nonsinusoidal sources and linear loads. In contrast to the technique developed by Steinmetz, this method is supported by geometric algebra instead of the algebra of complex numbers, uses multivectors in place of phasors and is performed in theGNdomain instead of the frequency domain. The advantages of this method over ... View full abstract»

• ### The Circuit Theory Behind Coupled-Mode Magnetic Resonance-Based Wireless Power Transmission

Publication Year: 2012, Page(s):2065 - 2074
Cited by:  Papers (202)
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Inductive coupling is a viable scheme to wirelessly energize devices with a wide range of power requirements from nanowatts in radio frequency identification tags to milliwatts in implantable microelectronic devices, watts in mobile electronics, and kilowatts in electric cars. Several analytical methods for estimating the power transfer efficiency (PTE) across inductive power transmission links ha... View full abstract»

• ### Correction Structures for Linear Weakly Time-Varying Systems

Publication Year: 2012, Page(s):2075 - 2084
Cited by:  Papers (6)
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This paper presents correction structures compensating for the impact of linear weakly time-varying systems on bandlimited signals. The proposed structures can be used for the postprocessing and preprocessing of linear weakly time-varying systems which complements and generalizes the literature on iterative postcorrection methods. Furthermore, the precorrection of mixed-signal systems is discussed... View full abstract»

## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK