# IEEE Transactions on Circuits and Systems I: Regular Papers

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Displaying Results 1 - 24 of 24

Publication Year: 2012, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2012, Page(s): C2
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• ### Implementing Wavelets in Continuous-Time Analog Circuits With Dynamic Range Optimization

Publication Year: 2012, Page(s):229 - 242
Cited by:  Papers (20)
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Signal processing by means of analog circuits offers advantages from a power consumption viewpoint. A method is described to implement wavelets in analog circuits by fitting the impulse response of a linear system to the time-reversed wavelet function. The fitting is performed using local search involving an L2criterion, starting from a deterministic starting point. This approach offers... View full abstract»

• ### Synthesis of Bias-Scalable CMOS Analog Computational Circuits Using Margin Propagation

Publication Year: 2012, Page(s):243 - 254
Cited by:  Papers (8)
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Approximation techniques are useful for implementing pattern recognizers, communication decoders and sensory processing algorithms where computational precision is not critical to achieve the desired system level performance. In our previous work, we had proposed margin propagation (MP) as an efficient piecewise linear (PWL) approximation technique to a log-sum-exp function and had demonstrated it... View full abstract»

• ### The Design of an Operational Amplifier Using Silicon Carbide JFETs

Publication Year: 2012, Page(s):255 - 265
Cited by:  Papers (7)
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Superior performance of the Silicon Carbide (SiC) semiconductor in high temperature and harsh environment is widely known. However, utilizing the Vertical Channel 4H-SiC JFET (SiC JFET) for analog design exhibits significant design challenges, even at room temperature. The fundamental challenges are low intrinsic gain, the limitation of the Gate to Source Voltage Range (GSVR), and restrictions on ... View full abstract»

• ### Fully Integrated CMOS EME-Suppressing Current Regulator for Automotive Electronics

Publication Year: 2012, Page(s):266 - 275
Cited by:  Papers (2)
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In this paper, two circuit design techniques for lower electromagnetic emission (EME) are demonstrated based on shaping the supply current: 1) a discrete-time EME-SCR with a digital feedback loop to obtain more EME attenuation in the low frequency range starting from 150 kHz. It achieves maximum 30 dB di/dt reduction at high frequency with 60 μA quiescent current and a 230 pF on-chip capacitance. ... View full abstract»

• ### Sub-2-ps, Static Phase Error Calibration Technique Incorporating Measurement Uncertainty Cancellation for Multi-Gigahertz Time-Interleaved T/H Circuits

Publication Year: 2012, Page(s):276 - 284
Cited by:  Papers (9)  |  Patents (1)
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A foreground digital calibration method is presented that calibrates the timing offsets between the multiple T/H (track/hold) circuits of time-interleaved analog-to-digital converters and multi-phase serial links. Two quantizer-based phase detectors sample the outputs of adjacent track/hold circuits, detecting any phase offsets arising from process mismatches in both the timing verniers and the T/... View full abstract»

• ### Multirate Downsampling Hybrid CT/DT Cascade Sigma-Delta Modulators

Publication Year: 2012, Page(s):285 - 294
Cited by:  Papers (6)
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This paper presents a new concept of multirate cascade ΣΔ modulators, in which the signal is downsampled across the cascade instead of being upsampled as done in conventional multirate architectures. This strategy is suited for hybrid continuous-time/discrete-time cascade ΣΔ modulators, where only the front-end stage is implemented by continuous-time circuits, and the remaining back-end stages are... View full abstract»

• ### High-Order Mismatch-Shaped Segmented Multibit$\Delta \Sigma$DACs With Arbitrary Unit Weights

Publication Year: 2012, Page(s):295 - 304
Cited by:  Papers (6)
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This paper reports a new segment-mismatch-shaping technique for multi-bit ΔΣ DACs. Our technique allows an arbitrary weight of unit elements in each segment and a high (>; 2) segment mismatch shaping order. In addition, our required number of unit elements does not increase as the segment-mismatch-shaping order increases. Simulations under various conditions prove the validity of our technique. View full abstract»

• ### Inductorless Wideband CMOS Low-Noise Amplifiers Using Noise-Canceling Technique

Publication Year: 2012, Page(s):305 - 314
Cited by:  Papers (55)
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Two inductorless wideband low-noise amplifiers (LNAs) fabricated in a 65-nm CMOS process are presented. By using the gain-enhanced noise-canceling technique, the gain at noise-cancelling condition is increased, while the input matching is maintained. The first work is a common-source LNA with resistive shunt feedback. It achieves a maximum power gain of 10.5 dB, a bandwidth of 10 GHz, a noise figu... View full abstract»

• ### G-Band Injection-Locked Frequency Dividers Using$\pi$-type LC Networks

Publication Year: 2012, Page(s):315 - 323
Cited by:  Papers (6)
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Two high-frequency CMOS injection-locked frequency dividers (ILFDs) are realized by π-type LC networks. The frequency enhancement analysis and design considerations for the both ILFDs are given. The effects of vias and interconnections on the inductance and quality factor are also discussed. Both ILFDs have been fabricated in 65 nm CMOS process. The measured locking ranges of these two ILFDs are 1... View full abstract»

• ### An Ultra Low-Power CMOS Transceiver Using Various Low-Power Techniques for LR-WPAN Applications

Publication Year: 2012, Page(s):324 - 336
Cited by:  Papers (36)
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In this work, we implemented and evaluated a fully integrated 2.4 GHz CMOS RF transceiver using various low-power techniques for low-rate wireless personal area network (IEEE 802.15.4 LR_WPAN) applications in 0.18-μm CMOS technology. In order to achieve an ultra low power consumption, a RC oscillator (OSC) operating below 200 nA, a regulator operating below 200 nA for sleep mode, a quick start blo... View full abstract»

• ### A 255 MHz Programmable Gain Amplifier and Low-Pass Filter for Ultra Low Power Impulse-Radio UWB Receivers

Publication Year: 2012, Page(s):337 - 345
Cited by:  Papers (33)
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A 90 nm-CMOS power-optimized analog baseband chain for ultra-low-power impulse-radio ultra-wideband (IR-UWB) receivers is presented. The proposed device merges the functions of a programmable gain amplifier (PGA) and a low-pass filter (LPF). It consists of the cascade of three biquadratic cells made up by opamps in a series-shunt configuration, which features high input impedance, low load effects... View full abstract»

• ### High-Order$A$-Stable and$L$-Stable State-Space Discrete Modeling of Continuous Systems

Publication Year: 2012, Page(s):346 - 359
Cited by:  Papers (3)  |  Patents (2)
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This paper presents a new method to map a state-space continuous-time model into an equivalent discrete state-space model. It is shown that the discrete model can approximate the continuous one to an arbitrary high-order which can be set by the user. In addition, it is demonstrated that the constructed discrete model is guaranteed stable, where it can be run in anA-stable orL-stable ... View full abstract»

• ### Nonlinear State Feedback Design With a Guaranteed Stability Domain for Locally Stabilizable Unstable Quadratic Systems

Publication Year: 2012, Page(s):360 - 370
Cited by:  Papers (30)
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This work addresses the design of state feedback controllers for locally stabilizing open-loop unstable quadratic systems with guaranteed stability domain and performance. First, a method is derived to design a stabilizing nonlinear static state feedback controller, which is quadratic in the system state, while providing an enlarged stability region for the closed-loop system. The stabilization me... View full abstract»

• ### Stochastic Synchronization of Complex Networks With Nonidentical Nodes Via Hybrid Adaptive and Impulsive Control

Publication Year: 2012, Page(s):371 - 384
Cited by:  Papers (159)
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In this paper, the global exponential synchronization of delayed complex dynamical networks with nonidentical nodes and stochastic perturbations is studied. By combining adaptive control and impulsive control schemes, the considered network can be synchronized onto any given goal dynamics. The adaptive control is discontinuous and can overcome the unknown difference between dynamical nodes and goa... View full abstract»

• ### An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes

Publication Year: 2012, Page(s):385 - 398
Cited by:  Papers (37)  |  Patents (2)
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Compared to binary low-density parity-check (LDPC) codes, nonbinary LDPC codes have better error performance when the code length is moderate. This paper presents an efficient layered decoder architecture for nonbinary quasi-cyclic (QC) LDPC codes using the proposed barrel-shifter-based permutation network and minimum value filter which is used to determine the first few smallest values from a giv... View full abstract»

• ### Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System

Publication Year: 2012, Page(s):399 - 408
Cited by:  Papers (7)
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This paper presents optimized synchronization algorithms and architecture designs of a downlink baseband receiver for multiband orthogonal frequency division multiplexing ultra wideband (MB-OFDM UWB). The receiver system targets at low complexity and low power under the premise of good performance. At algorithm level, dual-threshold (DT) detection method is proposed for robust detection performanc... View full abstract»

• ### Implementation and Performance of DSP-Oriented Feedforward Power Amplifier Linearizer

Publication Year: 2012, Page(s):409 - 425
Cited by:  Papers (12)
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In this paper, a digital signal processing-oriented implementation of feedforward power amplifier linearizer (DSP-FF) is introduced. In DSP-FF, the signal and error cancellation circuits are implemented, partially, in the DSP regime. By doing so, the number of bulky radio frequency (RF) components is reduced and their functionality is replaced by more flexible DSP circuitry and also various implem... View full abstract»

• ### Quadratic Power Conversion for Power Electronics: Principles and Circuits

Publication Year: 2012, Page(s):426 - 438
Cited by:  Papers (21)
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Quadratic converters have the voltage conversion ratios of two cascaded converters, but with fewer switches. They are not widely used, however, because they are generally less efficient than other converter types, but they can be useful for certain applications. In this paper, the characteristics of quadratic converters are explained, several examples of where they can be used in industrial applic... View full abstract»

• ### Liquid Crystal Display (LCD) Supplied by Highly Integrated Dual-Side Dual-Output Switched-Capacitor DC-DC Converter With Only Two Flying Capacitors

Publication Year: 2012, Page(s):439 - 446
Cited by:  Papers (8)
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This paper proposes a highly integrated dual-side dual-output (DSDO) switched-capacitor (SC) converter with only two flying capacitors. Generally, a dual-phase voltage doubler and an inverter are used to supply positive and negative voltages for thin film transistor-liquid crystal display (TFT-LCD) gate drivers, respectively. Four flying capacitors, eight pin-outs for the four flying capacitors, a... View full abstract»

• ### IEEE Transactions on Circuits and Systems—I: Regular Papers information for authors

Publication Year: 2012, Page(s): 447
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Publication Year: 2012, Page(s): 448
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• ### IEEE Circuits and Systems Society Information

Publication Year: 2012, Page(s): C3
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## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK