# IEEE Transactions on Circuits and Systems I: Regular Papers

## Filter Results

Displaying Results 1 - 22 of 22

Publication Year: 2011, Page(s): C1
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2011, Page(s): C2
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• ### Alias Rejection of Continuous-Time$\Delta\Sigma$Modulators With Switched-Capacitor Feedback DACs

Publication Year: 2011, Page(s):233 - 243
Cited by:  Papers (31)
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Continuous-time ΔΣ modulators (CTDSMs) with switched-capacitor (SC) feedback digital-to-analog converters (DACs) are relatively less sensitive to clock jitter when compared to converters that use non-return-to-zero feedback DACs. However, as we show in this paper, using an SC DAC can seriously compromise the alias rejection of the modulator, thereby nullifying one of the principal advantages of co... View full abstract»

• ### A Polar-Transmitter Architecture Using Multiphase Pulsewidth Modulation

Publication Year: 2011, Page(s):244 - 252
Cited by:  Papers (35)  |  Patents (3)
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This paper presents a transmitter architecture based on a pulse-modulated polar transmitter using multiphase pulsewidth modulation. The modulation to the radio-frequency input signal, instead of conventional drain modulation, significantly reduces the circuit complexity, while the multiphase modulation technique reduces the out-of-band emissions. An 836.5-MHz four-phase prototype transmitter using... View full abstract»

• ### Clock-Jitter-Tolerant Wideband Receivers: An Optimized Multichannel Filter-Bank Approach

Publication Year: 2011, Page(s):253 - 263
Cited by:  Papers (11)
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Clock jitter is one of the most fundamental obstacles in realizing future generations of wideband receivers. Stringent jitter specifications in the sampling clocks of high-performance single-channel and multichannel time-interleaved analog-to-digital converters severely limit the evolution of baseband receivers. This paper presents an analytical framework for the design of clock-jitter-tolerant lo... View full abstract»

• ### A Discrete-Time Model for the Design of Type-II PLLs With Passive Sampled Loop Filters

Publication Year: 2011, Page(s):264 - 275
Cited by:  Papers (6)
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Type-II charge-pump (CP) phase-locked loop (PLLs) are used extensively in electronic systems for frequency synthesis. Recently, a passive sampled loop filter (SLF) has been shown to offer major benefits over the conventional continuous-time loop filter traditionally used in such PLLs. These benefits include greatly enhanced reference spur suppression, elimination of CP pulse-position modulation no... View full abstract»

• ### Noise and Nonlinearity Modeling of Active Mixers for Fast and Accurate Estimation

Publication Year: 2011, Page(s):276 - 289
Cited by:  Papers (9)
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This paper presents a model of active mixers for a fast and accurate estimation of noise and nonlinearity. Based on closed-form expressions, this model estimates the noise figure, IIP3, and IIP2 of the time-varying mixer by a limited number of time-invariant circuit calculations. The model shows that the decreasing transistor output resistance, together with the low supply voltage in deep-submicro... View full abstract»

• ### Low-Power Discrete Fourier Transform for OFDM: A Programmable Analog Approach

Publication Year: 2011, Page(s):290 - 298
Cited by:  Papers (17)  |  Patents (6)
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The modulation and demodulation blocks in an orthogonal frequency-division multiplexing (OFDM) system are typically implemented digitally using a fast Fourier transform circuit. We propose an analog implementation of an OFDM demodulator as a means for reducing power consumption. The proposed receiver implements the discrete Fourier transform (DFT) as a vector-matrix multiplier using floating-gate ... View full abstract»

• ### A General Analytical Tool for the Design of Vibration Energy Harvesters (VEHs) Based on the Mechanical Impedance Concept

Publication Year: 2011, Page(s):299 - 311
Cited by:  Papers (26)
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This paper reports on a new approach for the analysis and design of vibration-to-electricity converters [vibration energy harvesters (VEHs)] operating in the mode of strong electromechanical coupling. The underlying concept is that the mechanical impedance is defined for a nonlinear electromechanical transducer on the basis of an equivalence between electrical and mechanical systems. This paper de... View full abstract»

• ### Theory of Injection-Locked Oscillator Phase Noise

Publication Year: 2011, Page(s):312 - 325
Cited by:  Papers (4)
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The paper describes the development of a model for the calculation of noise-driven phase response of an injection-locked oscillator perturbed by Gaussian white sources. Being based on the state space formalism the framework is unified encompassing all circuit topologies and methods of unilateral coupling. We thus avoid reverting to the kind of simplified block-diagram description that one finds in... View full abstract»

• ### Exponential Stability, Semistability, and Boundedness of a Multi-ANF System

Publication Year: 2011, Page(s):326 - 335
Cited by:  Papers (4)
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A nonlinear system being composed of multiadaptive notch filters in parallel is introduced to track the sinusoidal components of an almost periodic signal and estimate their frequencies and amplitudes. An almost periodic nonlinear dynamic system for estimation of frequencies is achieved after the existence of a slow integral manifold is proved and results in a nonlinear autonomous system with aver... View full abstract»

• ### A Graphical Approach to Prove Contraction of Nonlinear Circuits and Systems

Publication Year: 2011, Page(s):336 - 348
Cited by:  Papers (20)
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This paper derives a novel approach to prove contraction of nonlinear dynamical systems, based on the use of non-Euclidean norms and their associated matrix measures. A graphical procedure is developed to derive conditions for a system to be contracting. Such conditions can also be used to design control strategies to make a system contracting, or to design consensus and synchronization strategies... View full abstract»

• ### Robust$H_{\infty}$Synchronization Design of Nonlinear Coupled Network via Fuzzy Interpolation Method

Publication Year: 2011, Page(s):349 - 362
Cited by:  Papers (45)
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In this paper, theH∞theory is introduced to investigate the robustness and design of synchronization nonlinear coupled network. TheH∞synchronization performance is defined as the disturbance attenuation ability for a synchronized coupled network. To measure theH∞synchronization performance of a nonlinear coupled network, we need to solve a Hami... View full abstract»

• ### Evaluation of Gunshot Detection Algorithms

Publication Year: 2011, Page(s):363 - 373
Cited by:  Papers (8)
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Six preprocessing algorithms for the detection of firearm gunshots are statistically evaluated, using the receiver operating characteristic method as a previous feasibility metric for their implementation on a low-power VLSI circuit. Circuits are intended to serve as the input detection sensors of a low-power environmental surveillance network. Some possible VLSI implementations for the evaluated ... View full abstract»

• ### Solving Large-Scale Hybrid Circuit-Antenna Problems

Publication Year: 2011, Page(s):374 - 387
Cited by:  Papers (5)
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Motivated by different applications in circuits, electromagnetics, and optics, this paper is concerned with the synthesis of a particular type of linear circuit, where the circuit is associated with a control unit. The objective is to design a controller for this control unit such that certain specifications on the parameters of the circuit are satisfied. It is shown that designing a control unit ... View full abstract»

• ### Stabilization of a Class of Linear Systems With Input Delay and the Zero Distribution of Their Characteristic Equations

Publication Year: 2011, Page(s):388 - 401
Cited by:  Papers (11)
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This paper is concerned with stabilization of linear systems with arbitrarily large but bounded time-varying delay in the input. A pole assignment based low gain feedback design is adopted to solve the problem. Both delay-dependent and delay-independent results are presented and a series of sufficient conditions for guaranteeing the stability of the closed-loop system are established. By using pro... View full abstract»

• ### Efficient Partial-Parallel Decoder Architecture for Quasi-Cyclic Nonbinary LDPC Codes

Publication Year: 2011, Page(s):402 - 414
Cited by:  Papers (37)  |  Patents (1)
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Nonbinary low-density parity-check (NB-LDPC) codes constructed over GF(q) (q >; 2) can achieve higher coding gain than binary LDPC codes when the code length is moderate. A complete partial-parallel decoder architecture based on the Min-max algorithm is proposed for quasi-cyclic NB-LDPC codes in this paper. A novel scheme and corresponding architecture are developed to implement the elementary ... View full abstract»

• ### Processing-Task Arrangement for a Low-Complexity Full-Mode WiMAX LDPC Codec

Publication Year: 2011, Page(s):415 - 428
Cited by:  Papers (25)
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In this paper, we propose dividing the decoding operations of a variety of irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes into several smaller tasks. An algorithm is devised in order to arrange these tasks in a similar form such that a highly reusable multimode architecture can be designed to process these tasks. For this task-based decoder, the associated memory access can be a... View full abstract»

• ### On the Use of Soft-Decision Error-Correction Codes in nand Flash Memory

Publication Year: 2011, Page(s):429 - 439
Cited by:  Papers (133)  |  Patents (5)
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As technology continues to scale down, NAND Flash memory has been increasingly relying on error-correction codes (ECCs) to ensure the overall data storage integrity. Although advanced ECCs such as low-density parity-check (LDPC) codes can provide significantly stronger error-correction capability over BCH codes being used in current practice, their decoding requires soft-decision log-likelihood ra... View full abstract»

Publication Year: 2011, Page(s): 440
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• ### IEEE Circuits and Systems Society Information

Publication Year: 2011, Page(s): C3
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers Information for authors

Publication Year: 2011, Page(s): C4
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## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK