2008 International Conference on Computer Science and Software Engineering

Volume 4 • 12-14 Dec. 2008

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  • [Front cover - Vol 4]

    Publication Year: 2008, Page(s): C1
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  • [Title Page i - Volume 4]

    Publication Year: 2008, Page(s): i
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  • [Title page iii - Volume 4]

    Publication Year: 2008, Page(s): iii
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  • [Title page iv - Copyright notice - Volume 4]

    Publication Year: 2008, Page(s): iv
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  • Table of contents - Volume 4

    Publication Year: 2008, Page(s):v - xxii
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  • Welcome from the Conference Chair - Volume 4

    Publication Year: 2008, Page(s): xxiii
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  • Conference Organizing Committee - Volume 4

    Publication Year: 2008, Page(s): xxiv
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  • The Applications and Simulation of Adaptive Filter in Noise Canceling

    Publication Year: 2008, Page(s):1 - 4
    Cited by:  Papers (12)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (356 KB) | HTML iconHTML

    In practical application, the statistical characteristics of signal and noise are usually unknown or can't have been learned so that we hardly design fix coefficient digital filter. In allusion to this problem, the theory of the adaptive filter and adaptive noise cancellation are researched deeply in the thesis. According to the LMS and the RLS algorithms realize the design and simulation of adapt... View full abstract»

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  • A Monitoring System Based on Embedded Internet Technology for Embedded Devices

    Publication Year: 2008, Page(s):5 - 8
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (355 KB) | HTML iconHTML

    A monitoring system based on the embedded Internet technology for embedded devices is designed and implemented. The Browser/Server mode is adopted in this monitoring system and the realization technologies of an embedded Web server, which includes a thin TCP/IP stack, an embedded file system and a device gateway, are discussed in details. The way of embedding the Web server in the device makes it ... View full abstract»

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  • Modeling and Implementation for Embedded DC Motor Ethernet Control System

    Publication Year: 2008, Page(s):9 - 12
    Cited by:  Papers (1)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (335 KB) | HTML iconHTML

    In this paper, a model of Embedded DC Motor Ethernet Control System is proposed with analysis on transmission time delay and data packet dropout. Based on this model, the ECS is described as a two-state asynchronous dynamical system with output feedback control and then implemented on a platform which uses a PC as a central controller and an ARM9 kit as a remote controller. As a key part of develo... View full abstract»

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  • Studying and Implementation of Embedded System's Code Replacement Technique

    Publication Year: 2008, Page(s):13 - 17
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (489 KB) | HTML iconHTML

    A code replacement technique and tool were proposed in this paper, which can be used in embedded systems to fulfill the needs, module updating and debugging and defects modifying and otherwise, and promised that never disturb the system's routine running. The technique could be used in critical application areas for module updating and debugging, also some special areas which had some other requir... View full abstract»

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  • A High Performance Serial ATA Host Controller

    Publication Year: 2008, Page(s):18 - 23
    Cited by:  Patents (4)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (387 KB) | HTML iconHTML

    In order to increase transfer rate and enhance performance in mass data transmission and storage in real time system, a high performance Serial Advanced Technology Attachment generation 2(SATA II) host controller is proposed in this paper. This paper presents how to improve the hardware performance in course of implementation and validation. The controller was designed using VHDL and developed in ... View full abstract»

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  • The Design and Implementation of Online-Update on Embedded Devices

    Publication Year: 2008, Page(s):24 - 27
    Cited by:  Papers (2)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (680 KB) | HTML iconHTML

    As more and more embedded network devices appear, in order to meet changes of the function requirement or to fix bugs of software, these devices need to be online-updated at any moment. However, the online-update which updates the applications or the kernel of the embedded devices should be completed in the bootloader for safety considerations. Restricted by the storage capacity, the embedded devi... View full abstract»

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  • A Software Dual-Bus Architecture Suitable for Distributed Real-Time Embedded System

    Publication Year: 2008, Page(s):28 - 31
    Cited by:  Papers (2)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (193 KB) | HTML iconHTML

    Distributed, real-time and embedded (DRE) systems with high confidence demands can benefit from dynamic reconfiguration technology to adjust and reconfigure system resources at runtime in response to the running state and normal or abnormal events. Reconfiguration is also the key technology for mission computing and the software system dynamic evolution. Monitoring the key objects of the system an... View full abstract»

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  • The Design and Realization of Embedded Gateway Based on WSN

    Publication Year: 2008, Page(s):32 - 36
    Cited by:  Papers (6)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (707 KB) | HTML iconHTML

    The gateway realizes the fusion of wireless sensor network and external network. Some low performance gateways cannot meet the requirement of surge data collection. Consequently, a gateway that based on PXA270, using embedded Linux is designed to meet the requirement. To protect the data that transmitted by Ethernet through the gateway, a TCP/IP strategy is constituted, which can reduce the probab... View full abstract»

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  • Performance and Functional Analysis of TLM Models in the SHE Methodology

    Publication Year: 2008, Page(s):37 - 40
    Cited by:  Papers (1)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (166 KB) | HTML iconHTML

    Software/hardware engineering (SHE) is a model-driven system-level design methodology for hardware/software systems and embedded systems. It assists a designer in both the development of models for analysis purposes and the actual realisation of the system; and the toolset of SHE is the result of software engineering research with a very strong foundation in formal theories/methods. In the recent ... View full abstract»

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  • Design and Implement of Franking Machine Control System Based on ARM

    Publication Year: 2008, Page(s):41 - 44
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (368 KB) | HTML iconHTML

    This paper presents the design and implementation of franking machine control system using an embedded microcontroller. An ARM9 microcontroller and embedded real-time operating system RTAI-Linux were employed to implement the machine control and postage management. The implementation methodologies for embedded control system and franking mechatronic drive were studied. The test results show that t... View full abstract»

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  • Design of a General Purpose Sampling Integrated Module

    Publication Year: 2008, Page(s):45 - 49
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (248 KB) | HTML iconHTML

    AC sampling technique is the foundation of computer aided electrotechnics measurement. In practical applications, in order to improve the accuracy of electrotechnics measurement, especially to improve the accuracy of power measurement, it is very difficult for engineers to design both the software and hardware of AC sampling. (Usually the circuits are bulky and the software is quite complex.) This... View full abstract»

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  • An IEEE Compliant Floating-Point Adder with the Deeply Pipelining Paradigm on FPGAs

    Publication Year: 2008, Page(s):50 - 53
    Cited by:  Papers (2)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (315 KB) | HTML iconHTML

    FPGAs are increasingly being used to design high-end computationally intense microprocessors capable of implementing floating-point operations based hardware accelerators. In this paper, the throughput was improved by increasing the number of pipelining stages of the floating-point adder, and the feasibility of advancing the system clock rate was researched by making the most of plenty of flip-flo... View full abstract»

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  • The Design of HDTV H.264 Encoding System Based on Multi-DSPs Architecture

    Publication Year: 2008, Page(s):54 - 57
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (293 KB) | HTML iconHTML

    The emerging coding standard H.264 is mainly intended for video transmission in many areas. Considering the peculiarity of High-Definition TV (HDTV) encoding, the fast development of parallel technology and high-speed DSPs, the efficient hardware architectures were researched for the algorithm of H.264 encoding. After analyzing the experiment results from different platforms, we discussed the appl... View full abstract»

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  • Application of Floating Point DSP and FPGA in Integration Navigation System

    Publication Year: 2008, Page(s):58 - 61
    Cited by:  Papers (1)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (523 KB) | HTML iconHTML

    Strapdown inertial system is huge computation amount, high real-time speed, large-scale dynamic variable, high-precision operation, we need high-function device. These years, the using of combined DSP & FPGA applied widely in digital signal process really time. In this paper, combined our real work, An IFOG Strapdown Inertial Navigation System (SINS) based on floating point DSP TMS320C6713... View full abstract»

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  • GEMI: A High Performance and High Flexibility Memory Interface Architecture for Complex Embedded SOC

    Publication Year: 2008, Page(s):62 - 65
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (371 KB) | HTML iconHTML

    Two of the most significant factors in the success of todaypsilas system-on-chip (SoC) designs are the ability to deliver efficient access to off-chip high speed memory and the ability to be compatible with several different interface-timings of several different sorts of memories. And the scheduling scheme of data streams for multi-master and multi-outstanding requests situation in complex SoC sh... View full abstract»

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  • A System Platform Design of Travelling Wave Dielectrophoresis Microchip Based on SOPC

    Publication Year: 2008, Page(s):66 - 69
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (1193 KB) | HTML iconHTML

    This paper presents a control and acquisition platform design method of travelling wave dielectrophoresis microchip based on SOPC technique. The direct digital frequency synthesis (DDS) modeling is built by using the digital signal processing (DSP) development tool of FPGA, DSP Builder. By the controlling of NIOSII, which embedded in the FPGA (CyclonII EP2C35) of Altera corp., the four-phase DDS m... View full abstract»

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  • Develop of the Blast Furnace Soft Water Temperature Measurement System

    Publication Year: 2008, Page(s):70 - 74
    Cited by:  Papers (1)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (381 KB) | HTML iconHTML

    In order to ensure normal operation of the blast furnace (BF) closed loop soft water cooling system, cooling water temperature and the heat load must be controlled. It is the most important how the hundreds of large-scale blast furnace soft water temperature points for real-time detection. The DS18B20 digital thermometer was used as a temperature sensor. The DS18B20 communicates over a 1-Wire bus ... View full abstract»

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  • A Power-Efficient Floating-Point Co-processor Design

    Publication Year: 2008, Page(s):75 - 78
    Cited by:  Papers (1)
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (184 KB) | HTML iconHTML

    According to dramatically growing interesting in power-efficient embedded processor, designers must establish the proper power strategy when they design new embedded processor cores. This paper develops a SPARC compatible floating-point co-processor, which is part of a SPARC compatible embedded processor and implements the SPARC V8 floating-point instruction set except for square root and all quad... View full abstract»

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