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Circuits and Systems, IEEE Transactions on

Issue 7 • Date July 1978

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  • Editorial

    Publication Year: 1978 , Page(s): 389 - 390
    Cited by:  Papers (2)
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    Freely Available from IEEE
  • An improved successive-approximation register design for use in A/D converters

    Publication Year: 1978 , Page(s): 550 - 554
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (464 KB)  

    An improved design for a successive-approximation register (SAR) for use in A/D converters is presented. Thne proposed design is suitable for I^{2}L implementation such that a definite savings in devices is obtained over previous designs using the separate sequencer and code register approach. This particular design scheme operates in a fully synchronous mode with the clock allowing a reduction in propagation delay to be realized. View full abstract»

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  • Testing digital/analog and analog/digital converters

    Publication Year: 1978 , Page(s): 526 - 538
    Cited by:  Papers (21)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1464 KB)  

    This paper describes several D/A and A/D converter test circuits which range from simple and low-cost to fully automatic and expensive. Methods are presented to measure the more important specifications of offset, gain, full scale, linearity, and differential linearity errors. The discussions focus on, but are not limited to, testing 12-bit converters. Guidelines are given for determining the required accuracy of the measurement standard and for using proper circuit layout and wiring. Part of the test circuits are static and use a DVM as a reference. Other testers are dynamic and use a fast-settling D/A converter as a reference. Many of the circuits are manually operated, but others are automated using a computing controller. The unique characteristics of converters such as the symmetrical error patterns and the dynamic errors are discussed in light of how they relate to the techniques chosen to measure the errors. Part of the test methods assume that the weight of each bit in a converter is completely independent of the on/off state of the other bits (low superposition errors). When superposition errors are not small, they must be considered before choosing a test method. In general, the intent of this paper is to lay enough ground work so that the user of converter products can implement a test system that is both economical and sufficient to produce the desired results. View full abstract»

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  • Exponential D/A converter with a dynamic range of eight decades

    Publication Year: 1978 , Page(s): 522 - 526
    Cited by:  Papers (7)
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    The design of exponential D/A converters using the nonlinear I_{C}(V_{BE}) characteristic of bipolar transistors is analyzed. It is shown that if the errors of all possible sources are compensated or kept small, converters with a good relative accuracy and an extremely large dynamic range can be built. View full abstract»

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  • Specification of A/D and D/A converters for FDM telephone signals

    Publication Year: 1978 , Page(s): 461 - 467
    Cited by:  Papers (7)
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    Communication equipment requirements are generally established from the set of recommendations issued by the International Telephone and Telegraph Consultative Committee (CCITT). Those recommendations which influence the choice of the parameters of A/D and D/A converters for FDM signals are reviewed. Then a procedure for specifying such converters in terms of signal to total noise ratio is presented for two important applications, the 12-channel group codec and the 60-channel supergroup codec. The encoders and decoders can be synchronized and the advantage of time-sharing a single high-precision D/A module is stressed. A figure is also given for power consumption objectives. View full abstract»

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  • Linear electronic analog/digital conversion architectures, their origins, parameters, limitations, and applications

    Publication Year: 1978 , Page(s): 391 - 418
    Cited by:  Papers (22)  |  Patents (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2632 KB)  

    Various A/D and D/A conversions architectures, as evolved for communication oriented and computer related instrumentation, are described, and their relative advantages and disadvantages reviewed. Important parameters of performance are defined, and a number of critical factors involved in the design of A/D converters are considered. Emphasis is placed on the need for realistic "error budgets" and a recognition of the uncertainties and harsh realities of the environment in place. A number of A/D and D/A converter applications are reviewed to illustrate the diversity of requirements to be met by conversion system designers. View full abstract»

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  • A sigma-delta modulator as an A/D converter

    Publication Year: 1978 , Page(s): 510 - 514
    Cited by:  Papers (15)  |  Patents (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (568 KB)  

    A sigma-delta modulator system is discussed as an alternative to the dual-slope converter. A simple auto-zero circuit and cold switching of the gain setting can be obtained. The implementation of the analog system in the form of two bipolar IC's offers an attractive application as a multi-input data acquisition system with a scanning capability. A combination with a D/A converter increases the resolution with a small Increase in conversion time. Hardly any accurate elements are required in this application if the dynamic element matching method is used in the D/A converter. View full abstract»

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  • Oversampled, linear predictive and noise-shaping coders of order N > 1

    Publication Year: 1978 , Page(s): 436 - 447
    Cited by:  Papers (78)  |  Patents (15)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1216 KB)  

    First-order predictive coders (e.g., DPCM) and first-order noise shaping coders (e.g, interpolative coders) are familiar A/D conversion techniques. Using a feedback network containing an A/D and a first-order (single-pole) analog filter, they reduce the number of A/D output levels, for a given SNR requirement, at the expense of the additional analog filter complexity. Oversampling (i.e., sampling at higher than the Nyquist rate) provides excess bandwidth in the feedback loop, allowing further reductions in the number of A/D output levels at the expense of faster circuitry. This paper extends such first-order oversampled coders to include higher order analog filters under the constraint that the filters be independent of the statistical properties of the input analog signal. The resulting robust Nth-order predictive and noise-shaping coders allow N+1/2 bits to be eliminated from the coder's A/D for each doubling of the sample rate. The design of such Nth-order oversampled coders and an experimental third-order predictive coder are described. View full abstract»

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  • A monolithic 12-bit DAC

    Publication Year: 1978 , Page(s): 504 - 509
    Cited by:  Papers (3)  |  Patents (1)
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    A monolithic 12-bit digital-to-analog converter (DAC) using thin-film resistors is described. A primary feature is the capability of trimming for linearity after packaging using selective shorting of Zener diodes. Error measurement and trimming algorithms are discussed and an analysis of fundamental error sources is given. View full abstract»

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  • Characterizing and testing A/D and D/A converters for color video applications

    Publication Year: 1978 , Page(s): 539 - 550
    Cited by:  Papers (10)
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    During the past several years, the use of digital techniques in the field of color television has become widespread. This paper examines the fundamental building block for a digital system, the codec, consisting of an A/D converter, a D/A converter, and appropriate low-pass filters. After a brief description of the hardware, several parameters of particular interest In color video application are discussed. Test methods are described, and actual results are presented. Alternate test methods are proposed when conventional analog tests provide ambiguous or misleading results. The characterization procedures presented here should assist newcomers to digital television in evaluating A/D and D/A conversion equipment for use in video systems. The test results also indicate the high degree of performance that is achievable with properly designed state-state-of-the-art hardware. View full abstract»

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  • Realization of an adaptive delta modulation codec robust to channel errors

    Publication Year: 1978 , Page(s): 476 - 481
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    An adaptive delta modulation codec with companding logic incorporating an algorithm which automatically corrects mistracking between the coder and decoder logic circuits is described in this paper. The performance of this codec is evaluated using both computer simulation and hardware realization. The results show that at 64-kHz sampling rate using seven different quantizing steps, 30-40-dB S/ N_{Q} can be obtained for 900-Hz sinusoidal input over the input range of 50 dB. The mistracking correction time is calculated to be 0.5-2.5 ms for single channel error case and 1-7 ms for a larger mistracking case like at the moments of power application. The entire codec was realized on a 12 by 5- cm^{2} printed circuit board using a custom designed LSI for the companding logic part. View full abstract»

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  • Charge circuits for analog LSI

    Publication Year: 1978 , Page(s): 490 - 497
    Cited by:  Papers (35)  |  Patents (8)
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    Precision analog integrated circuits may be realized using MOS transistors and accurately ratioed MOS capacitors. Compatibility with high-density digital MOS circuits leads to the possibility of fully Integrated subsystems employing both analog and digital circuitry. This paper presents a unified view of sampled-data charge-conserving circuits for analog-to-digital (A/D) and digital-to-analog (D/A) converters and audio frequency filters. View full abstract»

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  • All-MOS analog digital conversion techniques

    Publication Year: 1978 , Page(s): 482 - 489
    Cited by:  Papers (4)  |  Patents (1)
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    MOS LSl technologies have recently shown their potential for use in precision analog-to-digital (A/D) and digital-to-analog (D/A) converters. Serial A/D converters with 11-bit accuracy and 100-ms conversion time, and successive approximation A/D converters with 10-bit accuracy and 25- \mu s conversion time have been demonstrated. View full abstract»

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  • A bipolar monolithic analog-to-pulsewidth converter

    Publication Year: 1978 , Page(s): 515 - 521
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    A precision analog-to-pulsewidth converter has been achieved with pulsewidth modulation technique and new circuit designs applied to a standard bipolar monolithic IC process. The magnitude and polarity of the input Information are determined by the pulsewidth modulated output signal within 0.002-percent linearity error and \pm 10 PPM/°C full-scale and zero-scale drift at low conversion rate. Although the low-frequency noise in EC buffer limits the actual resolution of the converter to 13 bits, the externally connected Zener diode in EC output reduces the EC noise, and the resolution increases to 15 bits which is consistent with the linearity of the converter. View full abstract»

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  • Optimum design, performance evaluation, and inherent limitations of DPCM encoders

    Publication Year: 1978 , Page(s): 448 - 460
    Cited by:  Papers (6)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1336 KB)  

    The technological feasibility of implementing high-speed analog-to-digital (A/D) converters intended to achieve very high signal-to-noise (S/N) performance as well as long-term stability operation depends critically upon the intrinsic component and circuit imperfections. In studying DPCM techniques for A/D conversion, these effects were included in the design and analysis of two predictive DPCM systems, the first having digital predictor feedback while the second used an analog predictor filter in the feedback loop. In the presence of noise due to quantization and threshold inaccuracies, new optimum linear predictor coefficients that are signal statistics independent were obtained. The noise due to circuit inaccuracies was found to have a pronounced effect on the S/N performance for both the digital and the analog predictor DPCM configurations. On the basis of these newly derived results there are strong indications that, in the presence of circuit imperfections, the S/N performance attainable by a simply oversampled A/D converter constitutes an upper bound on performance for any DPCM system constructed with components of similar accuracy. View full abstract»

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  • Monolithic charge-transfer A/D converter

    Publication Year: 1978 , Page(s): 497 - 503
    Cited by:  Papers (1)
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    The growing utilization of microprocessors and digital LSI circuits In solid-state control systems is currently generating a considerable interest in the development of low-cost technology-compatible analog-to-digital converters. In this paper, the design and operation of a monolithic charge-transfer analog-to-digital converter is reviewed, and its application in a digital control system where It has been used for voltage, resistance, and capacitance measurement is described. Experimental results showing better than l-mV resolution capability (equivalent to 10-12 bits) are reported. View full abstract»

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  • The D4 channel bank codec

    Publication Year: 1978 , Page(s): 468 - 475
    Cited by:  Papers (4)
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    A shared \mu \cong 255 PCM codec has been developed for the D4 channel bank which was introduced in 1976. The codec consists of two hybrid IC's that utilize a common LSI D/A converter chip. Operating over the temperature range of 0-75°C, the codec economically provides near theoretical S/D perfornance, gain tracking of better than \pm 0.25 dB, gain stability better than \pm 0.15 dB, and average system performance of 14.5-dBrnCO idle channel noise and 83-dB cross-talk coupling loss. A description of this codec and the derivation of its design objectives are presented. View full abstract»

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  • Principles of quantization

    Publication Year: 1978 , Page(s): 427 - 436
    Cited by:  Papers (62)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1248 KB)  

    Quantization is the process of replacing analog samples with approximate values taken from a finite set of allowed values. The approximate values corresponding to a sequence of analog samples can then be specified by a digital signal for transmission, storage, or other digital processing. In this expository paper, the basic ideas of uniform quantization, companding, robustness to input power level, and optimal quantization are reviewed and explained. The performance of various schemes are compared using the ratio of signal power to mean-square quantizing noise as a criterion. Entropy coding and the ultimate theoretical bound on block quantizer performance are also compared with the simpler zero-memory quantizer. View full abstract»

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  • Terminology related to the performance of S/H, A/D, and D/A circuits

    Publication Year: 1978 , Page(s): 419 - 426
    Cited by:  Papers (14)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1032 KB)  

    A review of terminology, often misunderstood or misused, concerning the performance of sample-and-hold (S/H) circuits, analog-to-digital (A/D) converters, and digital-to-analog (D/A) converters is presented. Although a set of general definitions is presented, definitions consistent with the needs of users and with the measurement capabilities of manufacturers are not easily obtained. The definitions presented have been selected by the authors from among defintions suggested by members of the Subcommittee on A/D and D/A Converters of the IEEE Network Applications and Standards Committee. It is hoped that others interested in the problem of terminology will submit their opinions to one of the authors before any final recommendations are made by the Subcommittee. View full abstract»

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  • Techniques for residue-to-analog conversion for residue-encoded digital filters

    Publication Year: 1978 , Page(s): 555 - 562
    Cited by:  Papers (37)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (872 KB)  

    Recent papers have reported that the use of residue number coding in digital filters can result in better speed/cost ratios when compared to filters designed with conventional adders and multipliers. This paper presents two approaches to the design of residue-to-analog converters to be used with residue number filters. The first approach, based on the associated mixed radix number system, is particularly useful when it is desired to translate the residue samples directly into analog form. The second approach, based on the Chinese remainder theorem, is a more direct method for translating from residue to weighted binary representation. A hardware feasibility model is described that was constructed to demonstrate the conversion principles. View full abstract»

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