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Advanced Packaging, IEEE Transactions on

Issue 1 • Date Feb 2001

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Displaying Results 1 - 16 of 16
  • Central wavelength tunable mechanism for temperature compensated package of fiber Bragg gratings

    Publication Year: 2001 , Page(s): 86 - 90
    Cited by:  Papers (6)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (112 KB)  

    The central wavelength of fiber Bragg grating (FBG) must be located in the specified channel band of wavelength division multiplexer (WDM) in optical communication network. Furthermore, the central wavelength also must he stable in the ambient temperature. A temperature compensated fixture Is therefore essential for the application of FBG. By the strength of materials, a theoretical model of the fully temperature compensated fixture can he derived for zero shift of central wavelength of FBG in ambient temperature. Besides, a microtunable mechanism for the pre-pulling force on the FBG is synthesized to adjust the central wavelength to a certain channel band. By this tunable mechanism one can calibrate effectively and efficiently the FBG in mass production of FBG based products View full abstract»

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  • A 100-Gb/s throughput ATM switch MCM with a 320-channel parallel optical I/O interface

    Publication Year: 2001 , Page(s): 91 - 98
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (440 KB) |  | HTML iconHTML  

    For an ATM switch system, we have developed a 100-Gb/s input/output (I/O) throughput optical I/O interface ATM switch multichip module (MCM) that has 320-ch optical I/O ports. This MCM is fabricated using ceramic (MCM-C) technology and very-small highly-parallel O/E and E/O optical converters. It uses 0.25-μm complementary metal oxide semiconductors (CMOS) ATM switch large scale integrations (LSIs) and has a total I/O throughput of up to 160 Gb/s. A prototype module with total I/O throughput of 100 Gb/s has been partially assembled using eight optical I/O interface blocks, each composed of a 40-ch O/E converter and a 40-ch E/O converter; the data rate per channel is from dc to 700 Mb/s. Using this module we developed an optical I/O interface ATM switch system and confirmed the operation of the optical interface View full abstract»

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  • Post-weld-shift in dual-in-line laser package

    Publication Year: 2001 , Page(s): 81 - 85
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (164 KB)  

    The post-weld-shift (PWS) effect in laser welding for a dual-in-line package (DIP) with fiber pigtail to semiconductor laser connection has been studied experimentally and numerically. Experimental results show that the PWS of an optical component welded by a dual-beam laser system deforms and the welded component rotates counterclockwise as the difference of the energies between two laser beams increases. This indicates that the PWS in laser packaging can be minimized by properly controlling the laser beam-to-beam energy balance. A thermal-plasticity coupled finite-element model (FEM) has been also carried out on the analysis of the effect of PWS in laser packaging. Numerical results show that a PWS in the DIP may be introduced from an unbalanced distribution of residual stresses introduced from the solidification shrinkage. A satisfactory agreement between the experimental results and FEM calculations suggests that the FEM may provide an effective method for predicting the PWS in laser welding technique for optoelectronic packaging View full abstract»

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  • Effect of cooling rate on the isothermal fatigue behavior of CBGA solder joints in shear

    Publication Year: 2001 , Page(s): 10 - 16
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (272 KB) |  | HTML iconHTML  

    This paper investigates the distribution characteristics of the isothermal fatigue lifetime of ceramic ball grid array (CBGA) solder joints in shear. Placement direction of the board-level assembly on the oven conveyor during reflow critically influences the fatigue lifetime of solder joints in shear: the front or outer solder joints have a longer shear lifetime than the rear or inner ones. The solder joints that moved diagonally during reflow have a longer fatigue lifetime and a tighter distribution. Cracks initiated in the eutectic solder region on the card and package side and tend to propagated in that region, while final failure occurred mainly on the card-said eutectic solder region. This phenomenon can be explained that the front or outer solder bumps have a resistant effect to the gas fluid which passes through the rear or inner solder bumps, and lower these solder joints' cooling rate during solidification. Fast cooling rate can cause a more fine-grained and homogeneous microstructure in eutectic solder alloy, which can delay crack initiation and slow crack growth. When the board-level assembly moves diagonally during reflow, the resistant effect of front solder bumps to the gas fluid reduces markedly. So the fatigue lifetime of solder joints and its distribution characteristic enhance substantially. The theories of fluid dynamics and heat transmission are used to calculate the decrease of gas fluid velocity and the corresponding reduction of mean coefficient of heat transfer (hm) View full abstract»

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  • The effects of underfill and its material models on thermomechanical behaviors of a flip chip package

    Publication Year: 2001 , Page(s): 17 - 24
    Cited by:  Papers (29)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (176 KB) |  | HTML iconHTML  

    In this paper, the effects of underfill on thermomechanical behavior of two types of flip chip packages with different bumping size and stand-off height were investigated under thermal cycling both experimentally and two-dimensional (2-D) finite element simulation. The materials inelasticity, i.e., viscoelasticity of underfill U8437-3 and viscoplasticity of 60 Sn40 Pb solder, were considered in the simulations. The results show that the use of underfill encapsulant increases tremendously (~20 times) the thermal fatigue lifetime of SnPb solder joint, weakens the effects of stand-off height on the reliability, and changes the deformation mode of the package. It was found that the thermal fatigue crack occurs in the region with maximum plastic strain range, and the Coffin-Manson type equation could then be used for both packages with and without underfill. Solder joint crack initiation occurred before delamination when using underfill with good adhesion (75 MPa) and the underfill delamination may not be a dominant failure mode in the present study. The interfacial stresses at the underfill/chip interface were calculated to analyze delamination sites, which agree with the results from acoustic image. Moreover, the effects of material models of underfill, i.e., constant elasticity (EC) and temperature dependent elasticity (ET) as well as the viscoelasticity (VE), on the thermomechanical behaviors of flip chip package were also studied in the simulation. The VE model gives comparatively large plastic strain range and large displacements in the shear direction, as well as decreased solders joint lifetime. The ET model gives similar results as the VE model and could be used instead of VE in simulations for the purpose of simplicity View full abstract»

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  • A method of investigating fine shorting whiskers within a leadframe molded package

    Publication Year: 2001 , Page(s): 99 - 103
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (172 KB)  

    A potential method to investigate fine whiskers which cause electric shorts between adjacent leads in a plastic molded leadframe is discussed. This technique uses mechanical milling and excimer laser etching to expose the fine whiskers within a packaged module. The combination of these two processes enables us to expose the fine whiskers without changing the position or composition. Subsequent material analyses can then be applied, and the process step by which the whisker was introduced can be determined. This method has also been applied in analyzing various soldering levels of a hybrid integrated circuit (IC) View full abstract»

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  • Three-dimensional flip-chip on flex packaging for power electronics applications

    Publication Year: 2001 , Page(s): 1 - 9
    Cited by:  Papers (15)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (228 KB) |  | HTML iconHTML  

    We have extended the concept of flip-chip technology, which is widely used in IC packaging, to the packaging of three-dimensional (3-D) integrated power electronics modules (IPEMs). We call this new approach flip-chip on flex IPEM (FCOF-IPEM), because the power devices are flip-chip bonded to a flexible substrate with control circuits. We have developed a novel triple-stacked solder bump metallurgy for improved and reliable device interconnections. In this multilayer structure, we have carefully selected packaging materials that distribute the thermo-mechanical stresses caused by mismatching coefficients of thermal expansion (CTEs) among silicon chips and substrates. We have demonstrated the feasibility of this packaging approach by constructing modules with two insulated gate bipolar transistors (IGBTs), two diodes, and a simple gate driver circuit. Fabricated FCOF-IPEMs have been successfully tested at power levels up to 10 kW. This paper presents the materials and reliability issues in the package design along with electrical, mechanical, and thermal test results for a packaged IPEM View full abstract»

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  • A novel high speed multitap bus structure

    Publication Year: 2001 , Page(s): 54 - 59
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (184 KB)  

    Reducing reflections, noise, and settling time on a bus through unique selections of node terminations, bus characteristic impedance, and bus construction allows dramatically higher operating speed. The new structure is described, the theory discussed, and results from fully operational physical and electrical implementations are presented View full abstract»

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  • Reliability studies μBGA solder joints-effect of Ni-Sn intermetallic compound

    Publication Year: 2001 , Page(s): 25 - 32
    Cited by:  Papers (38)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (260 KB) |  | HTML iconHTML  

    This paper studies the bending and vibration effects on the fatigue lifetime of ball grid array (BGA) solder joints. The correlation between the fatigue lifetime of the assembly and the heating factor (Q n), defined as the integral of the measured temperature over the dwell time above liquidus (183°C) in the reflow profile is discussed. Our result shows that the fatigue lifetime of μBGA solder-joints firstly increases and then decreases with increasing heating factor. The optimal heating factor Qn is found to be 300-680°C. In this range, the assembly possesses the greatest fatigue lifetime under various mechanical periodic stress, vibration and bending tests. The cyclic bending cracks always initiate at the point of the acute angle where the solder joint joins the PCB pad, and then propagate in the site between the Ni-Sn intermetallic compound (IMC) layer and the bulk solder. Under the vibration cycling, it is found that the fatigue crack initiates at valleys in the rough surface of the interface of the Ni-Sn IMC with the bulk solder. Then it propagates mostly near the Ni-Sn IMC layer and occasionally in the IMC layer or along the IMC/nickel interface. Evidently, the Ni-Sn IMC contributes mainly to the fatigue failure of the μBGA solder joints. The SEM and EDX inspection show that only Ni3Sn4 IMC forms between the tin-based solder and the nickel substrate. Moreover, no brittle AuSn4 is formed since all the Au coated on the pad surface is dissolved into the solder joint during reflowing. The formation of the Ni3Sn4 IMC during soldering ensures a good metallurgical bond between the solder and the substrate. However, a thick Ni-Sn IMC influences the joint strength, which results in mechanical failure. Based on the observed relationship of the fatigue lifetime with Ni-Sn IMC thickness and Qn, the reflow profile should be controlled with caution in order to optimize the soldering performance View full abstract»

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  • Multilayer planarization of polymer dielectrics

    Publication Year: 2001 , Page(s): 41 - 53
    Cited by:  Papers (4)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (580 KB)  

    Polymers are widely used in the microelectronics industry as thin-film interlevel dielectrics layers between metal lines, as passivation layers on semiconductor devices and in various packaging applications. As multiple layers of polymer and patterned metal are constructed, the ability of these polymers to planarize topographical features becomes increasingly important. In this study, the degree of planarization (DOP) for five commercially available polymers has been examined for three different structural configurations with the intent of simulating practical applications. Specifically, this study investigates single layer planarization, multiple coat planarization, and planarization of metal lines patterned on a polymer base. This study also examines the effects of orientation of the metal structure to polymer flow during spin casting and location on the wafer. The polymers are selected to investigate different polymer chemistries frequently used in the microelectronics industry. The underlying structures were fabricated using standard photolithography and electroplating techniques. Feature dimensions include 25-200 μm line spacings and widths with the polymer overcoat thickness being twice the height of the underlying structures View full abstract»

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  • Influence of ceramic surface treatment on peel-off strength between aluminum nitride and epoxy-modified polyaminobismaleimide adhesive

    Publication Year: 2001 , Page(s): 104 - 112
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (212 KB)  

    Peel-off strength between aluminum nitride (AlN) ceramics and a polyaminobismaleimide (PABM) adhesive is investigated after surface treatments. The surface treatments of the AlN substrates were oxygen plasma exposure, K2O·n(B2O3) aqueous solution immersion and a combination of the two. Each of the three methods increases the peel-off strength compared to that in the case of no surface treatment. In the case of the combination of oxygen plasma exposure for 60 s and K2O·n(B2O3) aqueous solution immersion for 10 min, average peel-off strength was over 1.6 N/mm, whereas that in the case of no surface treatment was 0.14 N/mm. Oxygen plasma exposure and K2O·n(B2O3) aqueous solution immersion decreased the relative amounts of carbon and hydrocarbon on the surface of as-sintered AlN substrates. On the other hand, the relative amount of hydrophilic groups, such as COO, C=O, and C-O relatively increased. This chemical change is effective for increasing peel-off strength. The results of measurement of surface free energy of the AlN substrate surface indicate that these surface treatments increase surface energy of AlN substrates from about 47 to 60 mJ/m2. When AlN substrate was immersed in K2O·n(B2O3) aqueous solution, tiny protrusions were formed on the AlN grain surfaces. The approximate height and pitch of the protrusions were about 30 nm and 60 nm, respectively, in the case of immersion for 10 min. Most AlN grains were etched, although not all. This change in shape of grains brings about resistance to peeling and contributes to enlargement of the surface area. Due to these effects, average peel-off strength of AlN substrates with both oxygen plasma exposure and K2O·n(B2 O3) aqueous solution immersion was 1.1 N/mm even after 800 cycles of thermal cycling and the value is still larger than that required for the practical package application View full abstract»

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  • Development of microwave multilayer plastic-based multichip modules

    Publication Year: 2001 , Page(s): 37 - 40
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (112 KB) |  | HTML iconHTML  

    We present the design and development of multilayer plastic-based multichip modules (MCM) at microwave frequencies. A vertical feed-through interconnect, which consists of embedded copper wires in plastic, has been developed to transport RF/microwave and dc signals from the first to the second packaging level. The development of this vertical feed-through enables plastic modules to be configured in a surface mount topology that can be interfaced with low cost FR-4 boards using ball grid arrays (BGA). The experimental analysis results demonstrate that this vertical feed-through used with BGAs has ultra-low parasitics and achieves a return loss of greater than 20-dB at 4-GHz. In addition, we demonstrate a number of packaged active microwave circuits including a switch, a low noise amplifier (LNA) and a power amplifier using the plastic module technology at microwave frequencies View full abstract»

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  • Significance of coating stress on substrate bow in large area processing of MCM

    Publication Year: 2001 , Page(s): 33 - 36
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (76 KB)  

    The substrate bow in a large area processing (LAP) was simulated using a finite element analysis (FEA). The structures considered were aluminum (Al) and glass substrates of various thicknesses, and a coating from Photosensitive film thickness. It was found that the deflection of a large area substrate, e.g., 400 mm2, could not always be obtained from the linear, small deflection theory even if the curvature might be small and the stress-strain behavior in the linear elastic regime. In this case, the nonlinear, large deflection theory had to be adopted. Also, the gravity effect from the substrate weight turned out to be very significant and had to be incorporated as well. The simulation incorporating these two factors agreed well with the experimental data, which was generated by spin coating and curing the BCB formulation on Al substrates, 400×400×1.27 mm. As a means of flattening out the curvature, subjecting a vacuum underneath the substrate was simulated. Significant reduction of the substrate deflection was observed by applying only a very small vacuum. This result suggested that the use of double-stick tape on the bottom of the substrate, for example, might also of feasible to completely eliminate the bow View full abstract»

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  • Experimental verification of the use of metal filled via hole fences for crosstalk control of microstrip lines in LTCC packages

    Publication Year: 2001 , Page(s): 76 - 80
    Cited by:  Papers (14)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (80 KB)  

    Coupling between microstrip lines in dense RF packages is a common problem that degrades circuit performance. Prior three-dimensional-finite element method (3-D-FEM) electromagnetic simulations have shown that metal filled via hole fences between two adjacent microstrip lines actually increases coupling between the lines; however, if the top of the via posts are connected by a metal strip, coupling is reduced. In this paper, experimental verification of the 3-D-FEM simulations is demonstrated for commercially fabricated low temperature cofired ceramic (LTCC) packages. In addition, measured attenuation of microstrip lines surrounded by the shielding structures is presented and shows that shielding structures do not change the attenuation characteristics of the line View full abstract»

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  • Integrated transient thermal and mechanical analysis of molded PBGA packages during thermal shock

    Publication Year: 2001 , Page(s): 66 - 75
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (212 KB)  

    During thermal shock, large thermal gradients exist within a molded plastic ball grid array (PBGA) package. The conventional assumption of uniform temperature distribution becomes invalid. In this paper, an integrated thermal-mechanical analysis was performed to evaluate the transient effect of thermal shock. For comparison, an isothermal analysis was also conducted. The computational fluid dynamics (CFD) method was used to obtain the thermal boundary conditions surrounding the package. The heat transfer coefficient obtained through CFD was compared to two analytical solutions. It was found that the analytical values were not acceptable in the time period of interest. Therefore, to obtain the actual maximum die stress, CFD solution has to be used instead of analytical solutions to derive the thermal boundary condition. This boundary condition was then applied to the package and a sequentially coupled heat transfer and thermal stress analysis was performed. The transient analysis has shown that high stresses occur in the die due to thermal shock, which can not be seen under the traditional isothermal assumption. The impact of plastic ball grid array (PBGA) package parameters on transient die stress was also studied, including mold thickness and substrate thickness. The results in this paper could be applied to either wire bond or flip-chip PBGA packages View full abstract»

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  • Simulating package behavior under power dissipation using uniform thermal loading

    Publication Year: 2001 , Page(s): 60 - 65
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (112 KB)  

    The thermomechanical behavior of electronic packages under power dissipation is simulated using uniform thermal loading. Two packages are studied, a large periphery leaded plastic quad flat pack (PQFP) package and a more compact plastic ball grid array (PBCA) package, both mounted on a printed circuit board (PCB). Experimentally verified linear elastic finite element models are used to find the displacements at the predicted failure location during power dissipation, and then during uniform thermal loading. The results for the two cases are then analyzed to find correlations between power dissipation levels and equivalent heating temperatures. One use of the results could be to replace power cycling fatigue tests with thermal cycling tests, For the packages studied, the results revealed that very little uniform heating is required to simulate the thermomechanical effects at the failure location resulting from power dissipation. Due to the prestrained state of the packages at room temperature, power dissipation decreases the expansion mismatch while increasing the thermal mismatch between package and PCB View full abstract»

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Aims & Scope

IEEE Transactions on Advanced Packaging has its focus on the design, modeling, and application of interconnection systems and packaging: device packages, wafer-scale and multichip modules, TAB/BGA/SMT, electrical and thermal analysis, opto-electronic packaging, and package reliability.

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Ganesh Subbarayan
Purdue University, School of Mechanical Engineering