12-16 Sept. 2011
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[Front matter]
Publication Year: 2011, Page(s):i - viii|
PDF (536 KB)
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ESSCIRC 2011 Table of contents
Publication Year: 2011, Page(s):1 - 35|
PDF (196 KB)
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Analog design trends and challenges in 28 and 20nm CMOS technology
Publication Year: 2011, Page(s):1 - 4
Cited by: Papers (3)Market trends for Multimedia Application Processor go on pushing CMOS technology in nanometer range. This puts analog design community in a strange paradox with simultaneously big challenges and tremendous opportunities. Analog is more than ever a key ingredient of advanced SoC with high performances PLL, giga samples high speed serial links and embedded power management. Challenge appears while a... View full abstract»
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Circuit design in organic semiconductor technologies
Publication Year: 2011, Page(s):5 - 12
Cited by: Papers (1)In this paper, we review the state of the art of digital and analog circuits that have been shown in recent years in organic thin-film transistor technology on flexible plastic foil. The transistors are developed for backplanes of displays, and therefore have the characteristics to be unipolar and to possess two gates. The dual-gate architecture is employed to increase the transistors intrinsic tr... View full abstract»
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Photonics — Electronics integration on CMOS
Publication Year: 2011, Page(s):13 - 18Silicon photonics has generated an outstanding interest for optical communications and for inter and intra-chip interconnects in electronic systems. High performance generic building blocks that can be used for a broad range of applications have already been demonstrated such as waveguides, I/O couplers, laser sources by III-V/Si heterogeneous integration, fast silicon modulators and germanium pho... View full abstract»
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Brain-machine interfaces as the new frontier in extreme miniaturization
Publication Year: 2011, Page(s):19 - 24The exact functioning and operation of the brain has been and still is to a major degree a great mystery. The recent introduction of advanced imaging tools such as fMRI, EEG and eCoG and, most recently, direct neural sensing are throwing the doors of neuroscience wide open, and enable direct in-vivo observations of the brain at work in dynamic conditions. This may help to address a broad range of ... View full abstract»
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Multimode-multiband transceivers for next generation of wireless communications
Publication Year: 2011, Page(s):25 - 36
Cited by: Papers (4)Multi-standard connectivity has become de-facto for smart phones and laptops but is emerging also to other more specialized gadgets like e-book readers. Such devices need to be designed for the best performance even when multiple standards are operating simultaneously. In the future, RF band allocations will make the scene even more complex especially in LTE evolution towards band aggregation. Onc... View full abstract»
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Wireless medical implant technology — Recent advances and future developments
Publication Year: 2011, Page(s):37 - 41
Cited by: Papers (1)Wireless medical implant technology has been revolutionized in the last 10 years with the introduction of the world-wide Medical Implant Communication Service (MICS 402-405 MHz) and more recently MedRadio (401-406) MHz band. This has enabled the growth of remote monitoring with improved patient care. Recent advances and future developments in this growth area are presented. View full abstract»
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DC-DC converters: From discrete towards fully integrated CMOS
Publication Year: 2011, Page(s):42 - 49
Cited by: Papers (5)Monolithic integration of electronic systems is one of the major techniques to reduce cost, size and power consumption in state-of-the-art consumer applications. Integration of transceivers and other mixed-signal building blocks has proven to be a very successful approach to build low cost, compact and portable systems [1]. Remarkably a certain building block remains discrete in commercial applica... View full abstract»
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High-k/metal gate innovations enabling continued CMOS scaling
Publication Year: 2011, Page(s):50 - 58
Cited by: Papers (5) | Patents (15)High-k dielectrics and metal gate electrodes have entered complementary metal-oxide-semiconductor (CMOS) logic technology, integrated in both gate-first and gate-last schemes. We review gate-first high-k / metal gate (HKMG) innovations enabling continued device scaling to the 22 and 14 nm nodes and beyond. First, we summarize some of the insight that allowed early HKMG challenges such as equivalen... View full abstract»
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Fundamentals and current status of steep-slope tunnel field-effect transistors
Publication Year: 2011, Page(s):59 - 60The tunnel field-effect transistor (TFET) utilizes a metal-oxide-semiconductor MOS structure to control the Zener tunneling current in a p+n+ junction. Current understanding and status in the development of TFETs with steep inverse-subthreshold-slope is reviewed. View full abstract»
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Current status on GaN-based RF-power devices
Publication Year: 2011, Page(s):61 - 66In this paper, we review the recent advances of GaN power switching and RF transistors developed at Panasonic. The presented devices are formed on cost effective Si substrates, which are very promising for the future mass production contributing to the reduction of the total fabrication cost. We develop the epitaxial growth technology using metal organic chemical vapor deposition (MOCVD) over 6-in... View full abstract»
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A 7-bit 18th order 9.6 GS/s FIR filter for high data rate 60-GHz wireless communications
Publication Year: 2011, Page(s):67 - 70
Cited by: Papers (1)This paper presents the design and measurements of a 4× oversampled 18th order digital low-pass FIR filter aimed at replacing all analog baseband filters in a 60 GHz high data-rate wireless communication transmitter. Pipeline CPL adders and TSPC flip-flops are used to enable a very high output sample rate. The filter area is 0.1mm2 in a standard 65nm CMOS process. The interpolato... View full abstract»
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A 2.97 Gb/s DPA-resistant AES engine with self-generated random sequence
Publication Year: 2011, Page(s):71 - 74
Cited by: Papers (5)This paper presents a DPA-resistant AES crypto engine. The DPA countermeasure circuit is combined with a self-generated random number generator to eliminate an extra circuit for generating random bits. The cell area for the DPA-resistant AES crypto engine is 0.104 mm2 in UMC 90 nm CMOS technology, which is only 6.2% larger than an unprotected AES engine. The maximum operating frequency ... View full abstract»
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Area- and energy-efficient high-throughput LDPC decoders with low block latency
Publication Year: 2011, Page(s):75 - 78
Cited by: Papers (2)The challenge in designing LDPC decoders is the efficient realization of the global communication between the two basic component types of such a decoder. Tight timing constraints in high-performance applications demand for a dedicated interconnect, which in general negatively affects the decoder features, especially the silicon area. Various approaches to reduce this impact have been discussed in... View full abstract»
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A 2.56 Gb/s soft RS (255,239) decoder chip for optical communication systems
Publication Year: 2011, Page(s):79 - 82
Cited by: Papers (5) | Patents (1)Due to the increasing uncertainty of data for higher transmission rate, the Forward Error Correction (FEC) devices need to provide more powerful error correcting capability for optical communication systems. As compared with traditional hard RS decoders, the soft RS decoders can perform substantial coding gain but require much higher hardware complexity. In this paper, a decision-confined algorith... View full abstract»
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A 128×128b high-speed wide-and match-line content addressable memory in 32nm CMOS
Publication Year: 2011, Page(s):83 - 86
Cited by: Papers (4)A 128-entry × 128b content addressable memory (CAM) design enables 145ps search operation in 1.0V, 32nm high-k metal-gate CMOS technology. A high-speed 16b wide dynamic AND match-line, combined with a fully static search-line and swapped XOR CAM cell simulations show a 49% reduction of search energy at iso-search delay of 145ps over an optimized high-performance conventional NOR-type CAM de... View full abstract»
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A 3.4W digital-in class-D audio amplifier
Publication Year: 2011, Page(s):87 - 90In this paper a class-D audio amplifier for mobile applications is presented realized in a 0.14μm CMOS technology tailored for mobile applications. The amplifier has a simple PDM-based digital interface that requires only two pins and enables assembly n 9-bump WL-CSP. A reconfigurable ate driver is used that reduces quiescent current consumption and radiated emission. View full abstract»
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An audio 91-dB THD third-order fully-differential class-D amplifier
Publication Year: 2011, Page(s):91 - 94
Cited by: Papers (7) | Patents (1)Class-D amplifiers exhibit high efficiency in spite of their simple implementation and, therefore, they are often used in portable devices with typical THD performance of the order of -65 dB. Presently, the possibility of using class-D amplifiers in applications requiring better THD (THD <; -85 dB) is being investigated, in consideration of their possible application in huge markets (like high-... View full abstract»
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Linearity and intrinsic gain enhancement techniques using positive feedbacks to realize a 1.2-V, 200-MHz, +10.3-dBm of IIP3 and 7th-order LPF in a 65-nm CMOS
Publication Year: 2011, Page(s):95 - 98
Cited by: Papers (1)Linearity and intrinsic gain enhancement techniques for realizing high-performance and low-voltage analog circuits in a deep-submicron CMOS are introduced. In place of a differential amplifier for the voltage-to-current (V/I) conversion at the input, a V/I conversion using a linear resistor and a positive feedback in a pseudo-differential configuration was adopted. The positive feedback concept wa... View full abstract»
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A 3.6mW @ 1.2V high linear 8th-order CMOS complex filter for IEEE 802.15.4 standard
Publication Year: 2011, Page(s):99 - 102
Cited by: Papers (2)This paper presents a fully differential 1.2V 8th-order inverter-based gm-C complex filter with 2.4MHz bandwidth and centered at 2.5MHz, designed in a 90nm CMOS technology. Tuning is carried out through voltage controlled capacitors instead of transconductors, resulting in a significant improvement in terms of linearity. The filter presents attractive attributes in terms of power, IRR, ... View full abstract»
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A 1.6mW 0.5GHz open-loop VGA with fast startup and offset calibration for UWB radios
Publication Year: 2011, Page(s):103 - 106
Cited by: Papers (2)This paper presents a low-power fast-startup wideband VGA with a 6th-order low-pass filter function for UWB radios. A DC-coupled 6-stage open-loop topology is proposed, which includes DC offset calibration and fast-startup biasing circuits. The prototype in 90nm CMOS occupies only 0.075mm2, including decoupling capacitors and digital interfacing. The circuit consumes 1.6mW from a 1V sup... View full abstract»
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A 100m-range 10-frame/s 340×96-pixel time-of-flight depth sensor in 0.18μm CMOS
Publication Year: 2011, Page(s):107 - 110
Cited by: Papers (4) | Patents (1)This paper introduces a high-performance optical depth sensor in a 0.18μm CMOS technology. At the core of the sensor, macro pixels consisting of 6×2 single-photon detectors enable accurate and selective time-of-flight measurements by taking advantage of temporal and spatial correlations of photons. An array of 32 high-throughput time-to-digital converters allows for the digitization ... View full abstract»
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CMOS 3D image sensor based on pulse modulated time-of-flight principle and intrinsic lateral drift-field photodiode pixels
Publication Year: 2011, Page(s):111 - 114
Cited by: Papers (6) | Patents (1)Design and measurement results of a CMOS 128 × 96 pixel sensor are presented, which can be used for three-dimensional (3D) scene reconstruction applications based on indirect time-of-flight (ToF) principle enabled by pulse modulated active laser illumination. The 40μm pitch pixels are based on the novel intrinsic lateral drift-field photodiode (LDPD) that allows for a 30ns complete c... View full abstract»
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A CMOS imager with digital phase readout for fluorescence lifetime imaging
Publication Year: 2011, Page(s):115 - 118
Cited by: Papers (6)This paper presents a novel CMOS image sensor with direct digital phase output for fluorescence lifetime imaging applications. The phase-shift between intensity modulated excitation signal and emitted fluorescence is extracted utilizing a zero-crossing detection algorithm as a time-domain delay signal. A Time-to-Digital Converter (TDC) is subsequently used to quantize the time delay into digital o... View full abstract»