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Proceedings of 4th Euromicro Workshop on Parallel and Distributed Processing

24-26 Jan. 1996

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Displaying Results 1 - 25 of 71
  • Author index

    Publication Year: 1996
    Request permission for commercial reuse | PDF file iconPDF (123 KB)
    Freely Available from IEEE
  • InHouse-a user-oriented monitoring approach

    Publication Year: 1996, Page(s):478 - 485
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1112 KB)

    We present a new approach for monitoring and visualization of parallel processing systems. Instead of measuring the system and presenting to the user a variety of performance figures and visualization displays afterwards, in this user oriented approach the events and features of interest may be selected before instrumentation and measurements. Different techniques for this a priori filtering of ev... View full abstract»

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  • Trace analysis with a relational database system

    Publication Year: 1996, Page(s):243 - 250
    Cited by:  Papers (3)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    One of the main problems dealing with trace based analysis of parallel systems is the management of the vast amounts of data produced by monitors. This paper describes the experiences made with a database approach for the management of trace data. The system is configurable in terms of trace formats and of metrics defined on this trace format. Performance measurements of the system conclude the pa... View full abstract»

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  • Parallelism extraction in acyclic code

    Publication Year: 1996, Page(s):437 - 447
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (744 KB)

    We describe a framework for parallelism extraction and partitioning in acyclic code regions. This framework is an extension of M. Girkar's (1981) work on functional parallelism, using a Petri net model to represent parallel code, and applying modified optimization techniques to minimize the overheads of explicit synchronization. The modifications introduced are directed towards the generation of e... View full abstract»

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  • A parallel processing environment for speech signal processing applications

    Publication Year: 1996, Page(s):470 - 477
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (628 KB)

    The paper describes a software tool that has been developed for production of speech signal processing systems, but may be easily expanded to include any 1 dimensional signal processing problem with multiple inputs and outputs. The tool allows the user to define an arbitrary set of interconnected signal processing functions that are interlinked by vectors of signal data, this kind of problem is th... View full abstract»

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  • Performance of shared cache on multithreaded architectures

    Publication Year: 1996, Page(s):541 - 548
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (728 KB)

    Uses a trace-driven simulation technique to study the performance impact on the storage hierarchy system in a multithreaded execution environment. Particularly, we examine the effects of different multithread scheduling techniques on cache performance using several program traces representing a typical server/workstation workload mix. An MRU (most recently used) priority scheduling scheme is propo... View full abstract»

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  • Extendible hashing for concurrent insertions and retrievals

    Publication Year: 1996, Page(s):235 - 242
    Cited by:  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (568 KB)

    Proposes an improved extendible hashing and bucket multi-versioning method, achieving a higher concurrency. In our improved extendible hashing, the global depth and directory entries are asynchronously modified to reduce lock conflicts on the directory. Furthermore, bucket multi-versioning enables read-only access to a bucket which is being split. Simulation studies show that these two methods pro... View full abstract»

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  • A Paralation model implementation based on a concurrent Lisp interpreter community

    Publication Year: 1996, Page(s):429 - 436
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB)

    We describe the approach we are pursuing to cope with parallelism in symbolic applications. Our purpose is to build a unified and user friendly parallel symbolic programming environment suited to distributed memory parallel systems (DMPS). This system is based on G.W. Sabot's (1987) Paralation model (in particular its LISP implementation, PARALATION LISP), whose main feature is to clearly differen... View full abstract»

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  • Rule-based routing in massively parallel systems

    Publication Year: 1996, Page(s):154 - 161
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB)

    In order to increase the performance of an interconnection network, efficient routing schemes are required which adapt to the system state. In this paper an approach to routing hardware is introduced which allows to tailor it flexibly to different routing algorithms and to incorporate different kinds of information easily within a routing decision. The key concept is to use a rule-based specificat... View full abstract»

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  • Developing distributed group communication in pSR

    Publication Year: 1996, Page(s):462 - 469
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (780 KB)

    Persistent SR (pSR) is an extended version of the distributed and concurrent programming language SR (Synchronising Resources). Concurrency is extended through persistence in pSR because resources can exist independently of a particular program execution and thus act as shared objects. The paper describes a new extension to pSR, the introduction of groups and group communications, and how they int... View full abstract»

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  • Performance evaluation of automatically generated data-parallel programs

    Publication Year: 1996, Page(s):534 - 540
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB)

    The problem of evaluating the performance of parallel programs generated by data-parallel compilers is studied. These compilers take as input an application written in a sequential language augmented with data distribution directives and produce a parallel version, based on the specified partitioning of data. A methodology for evaluating the relationships existing among the program characteristics... View full abstract»

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  • MANNA: prototype of a distributed memory architecture with maximized sustained performance

    Publication Year: 1996, Page(s):297 - 304
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (728 KB)

    The sustained performance of superscalar microprocessors amounts to only a fraction of their peak performance rating. In parallel computers realized with them this discrepancy is even more dramatic. Reaching a satisfactory sustained performance for the single processor is mainly a compiler problem. The sustained performance of parallel computers depends also on other components of the architecture... View full abstract»

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  • A new efficient submesh allocation strategy for mesh multicomputers

    Publication Year: 1996, Page(s):227 - 233
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (600 KB)

    The submesh allocation problem is to recognize and locate a free submesh that can accommodate a request for a submesh of a specified size. This paper proposes a new best-fit submesh allocation strategy. The proposed strategy maintains and uses a free submesh list to get global information for free submeshes. For an allocation request, the proposed strategy tries to allocate a best-fit submesh whic... View full abstract»

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  • Loop parallelization: revisiting framework of unimodular transformations

    Publication Year: 1996, Page(s):420 - 427
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    The paper extends the framework of linear loop transformations adding a new nonlinear step at the transformation process. The current framework of linear loop transformation cannot identify a significant fraction of parallelism. For this reason, we present a method to complement it with some basic transformations in order to extract the maximum loop parallelism in perfect nested loops with tight r... View full abstract»

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  • TransCom: a communication microkernel for transputers

    Publication Year: 1996, Page(s):147 - 153
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (580 KB)

    If parallel computers have to become general purpose tools, it is necessary to develop services that make transparent its internal characteristics and make parallel programming easier. Trying to fulfil this goal and to have a platform for the test and evaluation of mechanisms for a parallel architecture, a microkernel called TransCom has been designed for a distributed-memory multiprocessor. The m... View full abstract»

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  • Using ITL and Tempura for large-scale specification and simulation

    Publication Year: 1996, Page(s):493 - 500
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    ITL and Tempura are used for respectively the formal specification and simulation of a large scale system, namely the general purpose multi threaded dataflow processor EP/3. The paper shows that this processor can be specified concisely within ITL and simulated with Tempura. But it also discusses some problems encountered during the specification and simulation, and indicates what should be added ... View full abstract»

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  • Analysis and evaluation of sorting on hypercube-based systems

    Publication Year: 1996, Page(s):258 - 265
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (592 KB)

    This paper analyzes disk based sorting in parallel database systems. The parallel merge sort and the bitonic sort algorithms are modeled analytically and their performance is estimated. The obtained results are evaluated and compared with benchmark results of an implementation on a hypercube based system. Furthermore a novel, concise, but comprehensive analytical model for the evaluation of parall... View full abstract»

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  • Proceedings of 4th Euromicro Workshop on Parallel and Distributed Processing

    Publication Year: 1996, Page(s):455 - 461
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (656 KB)

    The following topics were dealt with: numerical algorithms; virtual shared memory; routing; programming tools; interconnection of networks; parallel database systems; object-oriented programming; load balancing and loop parallelization; and parallel performance, models and simulation View full abstract»

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  • Application-dependent performability evaluation of fault-tolerant multiprocessors

    Publication Year: 1996, Page(s):310 - 318
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (856 KB)

    A case study of performance and dependability evaluation of fault tolerant multiprocessors is presented. Two specific architectures are analyzed taking into account system functionality, actual workloads, failures of system components as well as the inter component dependencies. Since the evaluation of such complex systems has to be performed already during the design phase, simulation models are ... View full abstract»

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  • Deblocking event algorithm: a new approach to conservative parallel discrete event simulation

    Publication Year: 1996, Page(s):510 - 517
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (672 KB)

    Presents a new approach to perform distributed event driven simulation that we have named the `deblocking event algorithm'. This algorithm adopts the conservative paradigm, but takes into account the structural properties of the simulation network to reduce the overhead that any distributed simulation scheme inherently has. At the same time, the algorithm keeps a high degree of activity in the net... View full abstract»

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  • Simulating asynchronous architectures on transputer networks

    Publication Year: 1996, Page(s):274 - 281
    Cited by:  Patents (23)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (688 KB)

    Recently, there has been a resurgence of interest in asynchronous design techniques due to the potential of asynchronous logic for higher performance, power efficiency and immunity from clock related timing problems. Occam, a CSP based parallel language provides for the rapid development of asynchronous architectural simulation models which may then be executed on a transputer network to achieve h... View full abstract»

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  • Symbolic executions of symmetrical parallel programs

    Publication Year: 1996, Page(s):327 - 334
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (624 KB)

    We propose an algorithm to execute symbolically parallel programs with an unknown number of processes. Usually one instantiates the programs before their execution, i.e., one fixes the number of processes. We exploit the symmetrical behaviors of the processes to execute simultaneously all the instantiated programs. We define symbolic states that represent sets of states of an infinite number of in... View full abstract»

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  • The Abingdon Cross Benchmark on the two PAPRICA systems

    Publication Year: 1996, Page(s):526 - 533
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    Presents the results of the Abingdon Cross Benchmark on the two PAPRICA systems, which are briefly described, focussing especially on their different architectural solutions. Starting from some considerations on their computational paradigm and hardware characteristics, the most efficient algorithm for the Abingdon Cross Benchmark is discussed. The algorithm has been implemented on the two systems... View full abstract»

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  • Design and implementation of the control structure of the PAPRICA-3 processor

    Publication Year: 1996, Page(s):290 - 296
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (620 KB)

    The paper describes the pipeline architecture designed to control the execution of instructions on the linear array processor PAPRICA-9, which is being developed at the Politecnico di Torino. The main applications of the array processor lay in the area of image processing, image recognition, embedded systems for guidance assistance and the like. Exploitation of this architecture is currently inves... View full abstract»

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  • An empirical evaluation of techniques for parallel discrete-event simulation of interconnnection networks

    Publication Year: 1996, Page(s):219 - 226
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (604 KB)

    Three parallel discrete-event simulators-synchronous, conservative and optimistic-implemented on an Intel Paragon multicomputer are comparatively evaluated. Parallelism is achieved by model decomposition, distributing the simulation among a set of collaborative logical processes. The three simulators differ in the way those processes synchronize to obey causal restrictions in the simulation of eve... View full abstract»

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