[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications

13-16 May 1991

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Displaying Results 1 - 25 of 168
  • Data networking trends

    Publication Year: 1991, Page(s):1 - 8
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (278 KB)

    Summary form only given. In addition to the change from mainframe-dominated point-to-point networks, wide-area technology now offers a variety of transmission speeds and accommodates a variety of standards, all vendor independent. Technology trends and increased activity in the standards bodies allow the customer to select technology that can be offered from both private and public network provide... View full abstract»

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  • High level software engineering environments in high level synthesis of ASICs

    Publication Year: 1991
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (96 KB)

    Summary form only given. The use of a software engineering tool, the programming environment generator called CENTAUR, in the high-level synthesis of integrated circuits is described. How CENTAUR can be used in the IC design process is discussed. Also presented is how the VHDL (VHSIC hardware description language) standard fits into CENTAUR and, as an example, how the Ada genericity could be inclu... View full abstract»

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  • Proceedings. Advanced Computer Technology, Reliable Systems and Applications. 5th Annual European Computer Conference CompEuro '91 (Cat. No.91CH3001-5)

    Publication Year: 1991
    Request permission for commercial reuse | PDF file iconPDF (26 KB)
    Freely Available from IEEE
  • Animation prototyping of real-time systems specifications

    Publication Year: 1991, Page(s):562 - 566
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    Describes how animation prototyping can be applied to the formal specifications of real-time safety-critical systems as an aid to client/specifier communication. In particular, a method is defined for stating specifications in a structured hierarchical manner, while enabling the resulting decomposition to be mathematically verified. The method enables sequential ordering to be associated with VDM ... View full abstract»

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  • Mapping the generalized Hough transform on a mesh connected computer

    Publication Year: 1991, Page(s):248 - 252
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (548 KB)

    The computational complexity of the generalized Hough transform (GHT) on a mesh-connected computer (MCC) is analyzed, and a practical algorithm is given for bidimensional shape recognition which is useful in any real situation, not just in the asymptotic case. The problem of shape detection is introduced, along with a description of the generalized Hough transform. Mapping such a transform onto a ... View full abstract»

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  • Design and performance evaluation of a high throughput Ethernet/FDDI interconnect

    Publication Year: 1991, Page(s):89 - 93
    Cited by:  Papers (1)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    A filtering algorithm, called MFA, that sets the minimum power requirements for a bridge connecting an Ethernet LAN to a fiber-distributed data interface (FDDI) backbone is introduced. With current technology, however, even MFA cannot be implemented in software at an acceptable speed. A hardware solution based on the use of content-addressable memories (CAMs) is described, and a comparison is made... View full abstract»

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  • Applying formal specification and functional testing to graphical user interfaces

    Publication Year: 1991, Page(s):557 - 561
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (424 KB)

    A validation approach is presented for testing the functionalities of graphical user interfaces (GUIs). This validation approach attempts to derive tests from formal functional specifications of a GUI. In order to identify and test all display objects and functions systematically, an algebraic notation for enumeration is developed. This algebraic notation is used with path algebras, function decom... View full abstract»

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  • Window-based functional blocks for image processing

    Publication Year: 1991, Page(s):243 - 247
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB)

    A design methodology for the definition of parallel architectures for image processing is presented. The architectural design is based on functional blocks, operating on limited regions of neighboring pixels (windows) in the image plane. This window-based computational granularity allows the coverage of a wide range of image processing algorithms, with particular reference to image enhancement and... View full abstract»

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  • Structuring database specifications

    Publication Year: 1991, Page(s):406 - 411
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    The construction of specifications, their decomposition into separate modules and the reusability of such modules are key problems for the development of high-quality software. A discussion is presented of these issues for a small but realistic case study: the development of a database specification within the framework of an (algebraic) specification language (an extension of ASL) which allows pa... View full abstract»

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  • Design of online reconfigurable array processors

    Publication Year: 1991, Page(s):709 - 712
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    A design procedure for nonredundant arrays of processing elements, which is applicable to a wide class of algorithms, is extended for the design of online reconfigurable arrays. Online reconfiguration means it is performed concurrently with calculation. It is started at runtime by faults detected at run time. This requires the use of self-checking processing elements (PEs). After a brief introduct... View full abstract»

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  • The deflection network: a reliable high speed packet network for computer communication

    Publication Year: 1991, Page(s):84 - 88
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB)

    The performance of deflection networks (extension of Manhattan Street network) under bursty traffic has been analyzed assuming the use of a preference routing algorithm. The throughput performance under these conditions has proven to be almost independent from the burstiness of the traffic. Packets of a single burst are often received in the wrong alignment. Analyses simulating the generation of b... View full abstract»

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  • The high level design of a chip for scientific computation

    Publication Year: 1991, Page(s):811 - 815
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    An architecture and its high-level description of a chip suited for the exact calculation of inner products are discussed. A highly parallel implementation is developed using eight independent adder stations, which add products to two circular long accumulators. A dispatcher schedules each product to the best available station. To validate this architecture and to calculate its performance, a high... View full abstract»

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  • A constant-geometry semisystolic architecture for the fast Hartley transform

    Publication Year: 1991, Page(s):238 - 242
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    A parallel architecture is presented for the calculation of the fast Hartley transform (FHT) radix 2 which is adequate for its implementation in VLSI technology. A constant geometry (frequency decimation) algorithm for computing the FHT has been developed. The circuit proposed is characterized by its modular design and its interconnection regularity. It can be considered as semisystolic. It permit... View full abstract»

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  • The design of circuits with no timing references using the ALMA environment

    Publication Year: 1991, Page(s):596 - 598
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (304 KB)

    ALMA is a structured ASIC design methodology for silicon compilation to be used as a front end to existing CAD environments which provide the lower level silicon compilation tools (data path compiler, logic synthesizer, place-and-route, etc.). The methodology relies on the use of cell libraries available from vendors and a new hardware description language called `A'. The language describes the st... View full abstract»

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  • An indexing model for object-oriented database systems

    Publication Year: 1991, Page(s):287 - 289
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    In an OODBS (object-oriented database system), access to the persistent objects (i.e. objects stored in secondary memory) dramatically influences the system efficiency because of their size and data structure. In a relational DBS, special data structures, called indexes, are used for speeding up the process of locating data according to requirements of specific applications. It is argued that inde... View full abstract»

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  • Taking advantage of inheritance to specify parallel object behavior

    Publication Year: 1991, Page(s):108 - 112
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (500 KB)

    The aithor authors describe how the PO (parallel object) method takes advantage of inheritance to specify PO behavior at two different levels of abstraction: by programming intraobject scheduling and by expressing constraints. Low-level mechanisms that implement intraobject concurrent strategies in terms of variables and methods of scheduling are presented. Scheduling methods are subject to classi... View full abstract»

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  • A signalling system for multiprocessors

    Publication Year: 1991, Page(s):358 - 362
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (464 KB)

    The main functions and the architecture for a general-purpose signaling subsystem (for a shared memory, common bus multiprocessor) suitable for a VLSI implementation are presented. The performance of the subsystem for different load conditions has been evaluated by means of simulations. Simulation results show that, according to the steady-state analysis, the bus usage remains low at all clock fre... View full abstract»

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  • On modeling link conflict resolution strategies for circuit-switching hypercubes

    Publication Year: 1991, Page(s):662 - 666
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    An analysis is made of the latency time of an interconnection network based on a circuit switching technique for a hypercube multicomputer by using analytical and simulation models. To establish a path from a source to a destination node, some links have to be allocated. Links are serial resources, so when more communication requests request the same link, this contention has to be solved. Two mai... View full abstract»

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  • Extending database technology towards object orientation: for whom, why, and for what?

    Publication Year: 1991, Page(s):398 - 405
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (800 KB)

    After a discussion of object orientation technology and database management technology and their underlying motivations, a possible combined approach which takes advantage of the benefits of both approaches is outlined, and some of the main issues are addressed. An attempt is made to give some answers to the questions of why an extension of database technology towards object-orientation is needed ... View full abstract»

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  • A reconfigurable superchip for VLSI processing arrays

    Publication Year: 1991, Page(s):705 - 708
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (364 KB)

    A reconfigurable sparse matrix superchip (SMS) for VLSI processing arrays is presented. The superchip architecture, its reconfiguration, and routing strategies are discussed. The application of the SMS for basic signal processing computations like matrix-vector and matrix-matrix multiplications is illustrated. The SMS implementations promise to be more economical and faster than the original systo... View full abstract»

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  • Study of S-Aloha multihop packet radio networks with regular structures and piggybacked acknowledgments

    Publication Year: 1991, Page(s):79 - 83
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB)

    The performance characteristics of multihop homogeneous S-Aloha-type packet radio networks are investigated. Special attention is paid to the second-layer station protocols that include channel access, an acknowledgment (ACK) scheme, and buffer management. An analytic queuing network model which assumes limited queue dependency is developed. Multiple copies of global ACKs piggybacked to data packe... View full abstract»

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  • A graphical tool for protocol design with Estelle

    Publication Year: 1991, Page(s):552 - 556
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (352 KB)

    A new tool is described which enables the user to develop a protocol specification in the formal description technique. Estelle by working on graphical representations of Estelle constructs and objects. Only some parts of the specifications are handled in textual form (e.g., Pascal code), since they are of an intrinsically textual nature. The problems of combining graphical abstractions with pure ... View full abstract»

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  • SLICE and SLICE 1D: a cell compiler for VLSI design

    Publication Year: 1991, Page(s):796 - 799
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (312 KB)

    The SLICE and SLICE 1D set operates as a cell compiler. SLICE converts a behavioral description of a cell into an intermediate one in the form of recursive operators SLICE 1D implements the cell by abutment using elementary patterns dynamically generated according to the target technology View full abstract»

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  • Software reliability modelling: achievements and limitations

    Publication Year: 1991, Page(s):336 - 344
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (932 KB)

    An examination is made of the direct evaluation of the reliability of a software product from observation of its actual failure process during operation, using reliability growth modeling techniques described. Conclusions drawn from perfect working are examined. An assessment is also made of indirect sources of confidence in dependability. The author argues that one way forward might be to insist ... View full abstract»

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  • Implementation of an efficient algorithm for VLSI design rule checking on a 2-D mesh of transputers

    Publication Year: 1991, Page(s):458 - 461
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (268 KB)

    A design rule checking program for VLSI circuit layouts with Manhattan geometries is presented. The layout model is described along with the way the authors implemented the check through few and simple primitives for describing parameteric rules. A single main function for the geometrical test is outlined and how the authors succeeded in limiting the checking time through an algorithm characterize... View full abstract»

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