International Zurich Seminar on Digital Communications, Electronic Circuits and Systems for Communications.

5-8 March 1990

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Displaying Results 1 - 25 of 37
  • Advanced VLSI technology and design techniques for future telecom systems

    Publication Year: 1990, Page(s):3 - 26
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (517 KB)

    The impact of the introduction of telecommunication products, such as next-generation switching systems, optical transmission, and digital cellular radio, on VLSI technology and design methodology is discussed. It is shown how design concepts, supported by appropriate CAD (computer-aided design) tools, can make designs of complexities of up to 700000 transistors with operating frequencies of up to... View full abstract»

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  • An all-digital audioconference system

    Publication Year: 1990, Page(s):163 - 172
    Cited by:  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (393 KB)

    An all-digital audioconference bridge based on a four-wire network connection has been implemented. The audioconference bridge is implemented as a wire-wrap plug-in board to a digital exchange on a 2.048 Mb/s 32-channel PCM (pulse code modulation) link. The digital system is superior to the existing analog audioconference systems both in terms of setup time and quality of transmission. A general b... View full abstract»

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  • 1990 International Zurich Seminar on Digital Communications. Electronic Circuits and Systems for Communications. Proceedings (Cat. No.90TH0305-3)

    Publication Year: 1990
    Request permission for commercial reuse | PDF file iconPDF (15 KB)
    Freely Available from IEEE
  • On the interaction between DSP-algorithms and VLSI-architecture

    Publication Year: 1990, Page(s):219 - 230
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB)

    The interaction between DSP (digital signal processing) algorithms and VLSI architecture is addressed, and it is shown at which levels architecture analysis has to be undertaken and at which levels new possibilities can be exploited. It is noted that the new possibilities of implementing algorithms and even complex systems on dedicated chips lead to the necessity of undertaking a careful analysis ... View full abstract»

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  • Implementing VLSI components in telecommunications systems: benefits and pitfalls

    Publication Year: 1990, Page(s):292 - 303
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (896 KB)

    It is noted that VLSI components for applications in telecommunications systems can be classified in three different categories: standard circuits like microprocessors and memory chips, extensively standardized telecommunication-specific circuits such as codecs, filters, and customized ASICs (application-specific integrated circuits). The use of such components offers the system designer excellent... View full abstract»

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  • VLSI techniques for the communication market

    Publication Year: 1990, Page(s):211 - 216
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    Specific problems related to large-scale integration in the communication market are discussed. It is pointed out that the influence of integrated-circuit technology in the past few years has been pervasive, in areas from consumer products to business management to manufacturing control. It is noted that, in order to survive, it is necessary to have an optimal cost efficiency for the products. Thi... View full abstract»

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  • Procedure to align octets in broadband applications using chips in homogeneous technology

    Publication Year: 1990, Page(s):284 - 291
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (232 KB)

    A method for synchronization of broadband bit streams is described. It provides: alignment of octets in one step, avoiding shift operations in the serial-parallel conversion; cell delineation; shortest resynchronization time; and easy board layout by avoiding timing constraints. The method provides the best synchronization performance for ATM (asynchronous transfer mode) applications View full abstract»

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  • A Bi-CMOS ATM switching LSIC

    Publication Year: 1990, Page(s):195 - 210
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB)

    An IC designed for a high-speed broadband ISDN switching system is described. The IC was fabricated using a BiCMOS RAM and logic gate array. The IC has functions for cell buffering, switching, and VCI conversion. It features a pipeline configuration and a high-speed ECL (emitter coupled logic) interface for a throughput of 1.2 Gbit/s. Tests confirmed accurate switching. Using this IC, an ATM (asyn... View full abstract»

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  • Towards a special multitasking microprocessor for public-network telecom applications

    Publication Year: 1990, Page(s):243 - 255
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (796 KB)

    The multitasking support of some of the most advanced of today's microprocessors is investigated in order to derive design directives for a special microprocessor architecture devoted to applications in public network telecom systems. The brands selected are the INMOS transputer, the VL86C020 Acorn RISC (reduced instruction set computer) Machine (ARM) manufactured by VLSI Technology, and Intel's i... View full abstract»

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  • Survivable SuperNetwork-a 100 Mbit/s LAN with arbitrary redundancy

    Publication Year: 1990, Page(s):321 - 335
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (708 KB)

    SuperNetwork is a fiber-optic network presently available with a 100 Mbit data rate, capable of supporting a very large host population and readily attached to other networks such as Ethernet and FDDI. A way that SuperNetwork can be made resistant to multiple simultaneous faults by the use of redundancy is described. In general, the level of redundancy that can be installed is limited only by cost... View full abstract»

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  • All-digital synchronizers for DPSK demodulators

    Publication Year: 1990, Page(s):268 - 283
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    Maximum a posteriori (MAP) and data transition tracking loop (DTTL) synchronizers are developed for the differential phase shift keying (DPSK) scheme. In their original form, these synchronizers require substantial hardware for their realization. By some simplifications, hardware complexity can be considerably reduced. Simplified all-digital MAP and DTTL synchronizers are suggested. The hardware n... View full abstract»

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  • Quadrature mixer imbalances in digital TDMA mobile radio receivers

    Publication Year: 1990, Page(s):147 - 162
    Cited by:  Papers (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (532 KB)

    The impact of imbalances in nonperfect quadrature mixing stages on the performance of a TDMA (time-division multiple-access) mobile radio receiver with adaptive Viterbi-MLSE (maximum-likelihood sequence estimation) equalization is studied. Amplitude and phase imbalances in quadrature mixers give rise to nonlinear signal distortions which can be described using a simple mirror signal model. The mir... View full abstract»

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  • Cell alignment in ATM systems via header error check: performance evaluation and hardware considerations

    Publication Year: 1990, Page(s):115 - 130
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (460 KB)

    Cell synchronization for an asynchronous transfer mode (ATM) system via header error check is discussed, and a possible hardware implementation is given. For a performance evaluation the essential parameters are average cell loss and mean block length of the consecutively lost cells. For these parameters, formulae, or at least lower and upper bounds in closed form, are derived. The derivation is b... View full abstract»

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  • Architecture and technology for a flexible ATM switch element and network

    Publication Year: 1990, Page(s):87 - 102
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (432 KB)

    The principle of an asynchronous transfer mode (ATM) switch characterized by a high degree of flexibility is described. The flexibility is given with respect to cell length and traffic. In the case of a very long or an infinite length of cells, quasi-permanent connections with constant capacity can be switched. The principle is based on splitting of cells into a sequence of fractions of cells whic... View full abstract»

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  • Design of an enhanced FDDI-II system

    Publication Year: 1990, Page(s):418 - 432
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (580 KB)

    It is pointed out that the growing demand for more bandwidth and integrated telecommunication services in the customer premises area can be satisfied with the hybrid high-speed local area network FDDI-II (fiber distributed data interface). A hardware design based on existing highly integrated components for the FDDI protocol is presented. The design contains all features according to the proposed ... View full abstract»

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  • Silicon bipolar circuits for gigahertz communication systems mixers, multipliers, modulators

    Publication Year: 1990, Page(s):181 - 194
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB)

    Key elements for digital communication systems have been built on the basis of integrated silicon bipolar circuits. Experimental results are presented on mixers and multipliers suitable for operation for DC up to 10 GHz and above, as well as PSK (phase shift keying) modulators for frequencies up to 5 GHz and the corresponding demodulators. These elements have been obtained by modifications of elem... View full abstract»

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  • Silicon bipolar technology-a versatile base for high-speed communication circuits

    Publication Year: 1990, Page(s):27 - 38
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (344 KB)

    The technical requirements on versatile IC technologies include speed capability for operation in the 10 GHz range and above; low power consumption in the 1-5 GHz range for possible battery power supply; capability of high-precision analog functions at ultimate speed; uniformity and reliability for mass production; and capability of integration of complex systems on single chips. An overview is pr... View full abstract»

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  • On MMSE timing recovery using oversampling

    Publication Year: 1990, Page(s):474 - 494
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (504 KB)

    The realization of stochastic gradient MMSE (minimum mean square error) time recovery algorithms for digital receivers is analyzed and discussed in the framework of the hypothesis of oversampling the received signal with respect to synchronous sampling. It is shown that very simple and effective algorithms, especially suitable for digital implementation, are possible. A convergence analysis based ... View full abstract»

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  • The concept of virtual paths and virtual channels in ATM-networks

    Publication Year: 1990, Page(s):63 - 72
    Cited by:  Patents (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (368 KB)

    Problems which relate to the realization of an asynchronous transfer mode (ATM) network are described with particular emphasis on the subscriber access to the network, ATM connections, and switching of the ATM cells. A connection can be established either on the basis of a virtual channel or of a virtual path. To do the routing, translation of the virtual channel identifier (VCI) and the virtual p... View full abstract»

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  • Performance comparison of data manipulator type interconnection networks

    Publication Year: 1990, Page(s):387 - 409
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    A class of packet switched multistage interconnection networks based on PM2I interconnection functions is considered. This class of multistage interconnection topologies, called data manipulator networks, is analyzed using a novel approach to the performance evaluation of interconnection networks that has been developed in order to explain more accurately their various properties and capabilities ... View full abstract»

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  • A viable multi-standard rate adapter chip for ISDN communications

    Publication Year: 1990, Page(s):231 - 242
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (236 KB)

    A multistandard rate adapter coprocessor chip designed using 2 μm CMOS technology for use in integrated services digital network (ISDN) terminal adapters and U-interface modems is presented. It provides a compact, low-power protocol converter to connect asynchronous (up to 19200-bit/s) and synchronous (up to 64-kbit/s) data terminal equipment with any digital 64-kbit/s network. The connection t... View full abstract»

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  • A multichannel optical network

    Publication Year: 1990, Page(s):306 - 320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB)

    The performance of a network based on an optical star is discussed. Destination nodes are addressed by directly sending the information on the channel reserved to that node. Simulation of the network shows that the throughput-delay characteristic is dramatically affected by the output capabilities of the network nodes, i.e., by the number of packets they can simultaneously send. In particular, nod... View full abstract»

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  • Chip-size and power consumption of ASICs and digital signal processors for low-power signal-processing

    Publication Year: 1990, Page(s):256 - 267
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (452 KB)

    Signal-processing in battery-powered telecommunication equipment such as cordless telephone or radiotelephone can be done using a standard DSP (digital signal processor), a hardwired digital ASIC (application-specific integrated circuit) or an SC-circuit. Whether one of these alternatives is useful and advantageous for a particular application is determined by its cost and power consumption. A sim... View full abstract»

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  • Packet-switching network architectures for very-high-speed service

    Publication Year: 1990, Page(s):336 - 351
    Cited by:  Papers (4)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (484 KB)

    It is suggested that mesh-topology networks, deflection routing (DR), and backward learning (BL) are very attractive means for extending, to a geographical area, the services provided by LANs and MANs (local and metropolitan area networks). Unlike ring and bus topologies, mesh networks provide multiple paths between sources and destinations, which in turn offer very high connection reliability and... View full abstract»

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  • The policing function in an ATM network

    Publication Year: 1990, Page(s):131 - 144
    Cited by:  Papers (16)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (412 KB)

    The gabarit policing function, based on the mean and the standard deviation of a source's Gaussian envelope, is developed to optimally exploit the statistical multiplexing gain for VBR (variable bit rate) sources by guaranteeing not only the negotiated mean cell rate but also the negotiated variance for the policed connection. The parameters of the gabarit policing function can directly be used by... View full abstract»

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