2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)

12-14 Sept. 2018

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  • [Title page i]

    Publication Year: 2018, Page(s): 1
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  • [Title page iii]

    Publication Year: 2018, Page(s): 3
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  • [Copyright notice]

    Publication Year: 2018, Page(s): 4
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  • Table of Contents

    Publication Year: 2018, Page(s):5 - 9
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  • Preface

    Publication Year: 2018, Page(s): 10
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  • Message from Program Chairs

    Publication Year: 2018, Page(s): 11
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  • Organizing Committee

    Publication Year: 2018, Page(s): 12
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  • Program Committee

    Publication Year: 2018, Page(s):13 - 15
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  • Steering Committee

    Publication Year: 2018, Page(s): 16
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  • Keynotes

    Publication Year: 2018, Page(s):17 - 21
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (155 KB)

    Provides an abstract for each of the keynote presentations and may include a brief professional biography of each presenter. The complete presentations were not made available for publication as part of the conference proceedings. View full abstract»

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  • Tutorial

    Publication Year: 2018, Page(s): 22
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    Provides an abstract of the tutorial presentation and may include a brief professional biography of the presenter. The complete presentation was not made available for publication as part of the conference proceedings. View full abstract»

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  • Acknowledgements

    Publication Year: 2018, Page(s): 23
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  • Code Generation of Graph-Based Vision Processing for Multiple CUDA Cores SoC Jetson TX

    Publication Year: 2018, Page(s):1 - 7
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2002 KB) | HTML iconHTML

    Embedded vision processing is currently ingrained into many aspects of modern life, from computer-aided surgeries to navigation of unmanned aerial vehicles. Vision processing can be described using coarse-grained data flow graphs, which were standardized by OpenVX to enable both system and kernel level optimization via separation of concerns. Notably, graph-based specification provides a gateway t... View full abstract»

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  • An FPGA Scalable Parallel Viterbi Decoder

    Publication Year: 2018, Page(s):8 - 15
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (176 KB) | HTML iconHTML

    Viterbi decoders are an essential component in many embedded systems used for decoding streams of N data symbols over noisy channels. The decoding process is a sequential process wherein the decoder builds a trellis for N received symbols and then it traverses the trellis back computing the path in the trellis that implies the minimal amount of corrections in the bits of the N received symbols. Se... View full abstract»

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  • An Efficient Parallel Hardware Scheme for Solving the N-Queens Problem

    Publication Year: 2018, Page(s):16 - 22
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (397 KB) | HTML iconHTML

    The N-Queens problem is a generalized problem with the 8-Queens puzzle. The computational complexity of this problem is increased drastically when increasing N. To calculate the unsolved N-Queens problem in realistic time, implementing the high-speed solver and system is important. Therefore, efficient search methods of solutions by backtracking, bit operation, etc. have been introduced. Also, par... View full abstract»

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  • Simplified Quadcopter Simulation Model for Spike-Based Hardware PID Controller using SystemC-AMS

    Publication Year: 2018, Page(s):23 - 27
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB) | HTML iconHTML

    In this research, we employ spike-based PID controller for Quadcopter control. Quadcopters control their attitude by proportionalintegralderivative (PID) controller for four rotors. General hardware controllers use fixed point computations for PID that consume hardware resources. On the other hand, spike-based PID controller can reduce hardware cost compared with using fixed-point ones. For feasib... View full abstract»

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  • Unifying Wire and Time Scheduling for Highlevel Synthesis

    Publication Year: 2018, Page(s):28 - 35
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (193 KB) | HTML iconHTML

    Wire scaling is becoming problematic for semi-global and global wires in sub 40nm ASIC/VLSI chips. We propose an algorithm that simultaneously minimizes the time T and wire-lengths W for highlevel synthesis from C to Verilog. The program is compiled to a graphs G of arithmetic/logical and memory operations. We developed a formal model wherein the optimal product W × T of a given G can be resolved.... View full abstract»

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  • IPRDF: An Isolated Partial Reconfiguration Design Flow for Xilinx FPGAs

    Publication Year: 2018, Page(s):36 - 43
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1032 KB) | HTML iconHTML

    SRAM-based FPGA devices have been used widely in many industrial domains, but only limitedly in secure and safety-critical applications, which have special requirements for the physical implementation, such as module isolation. This is partly due to limited functionality available with current FPGA vendors' tools and flows. To extend FPGA's appearance in secure and safety-critical applications, we... View full abstract»

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  • On-Chip Lifetime Prediction for Dependable Many-Processor SoCs Based on Data Fusion

    Publication Year: 2018, Page(s):44 - 51
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (752 KB) | HTML iconHTML

    The developments in technology and complexity of many-processor Systems-on-Chips emerge at a very rapid pace as is their introduction in safety-critical applications, for instance the transport sector. The inherent decrease in dependability of these complex nanosystems must be compensated by counter measures. One promising approach is the usage of IJTAG-compatible embedded instruments in and aroun... View full abstract»

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  • Design Features of Analog-to-Digital Solutions for the Tracking Detector Readout Electronics

    Publication Year: 2018, Page(s):52 - 56
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    8-channel mixed-signal application specific test IC was implemented in a TSMC 0.18 µm CMOS MS/RF 1.8/3.3 V process. A single IC channel is comprised of a chargesensitive preamplifier/shaper with a semi-Gaussian response, shaping amplifier with ion tail cancellation circuitry, differential output baseline restorer, a 10bit 10MSPS ADC. The structural scheme and specification of the IC are presented,... View full abstract»

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  • Bluetooth Low Energy Based Indoor Positioning on iOS Platform

    Publication Year: 2018, Page(s):57 - 63
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (507 KB) | HTML iconHTML

    In this age of IoT (Internet of Things), Indoor Positioning (IPS) is considered as one of the most popular topics and has been researched widely all around the world, as the result of various applications it can provide. However, IPS is also a challenging topic that has a number of stringent requirements, such as cost, energy efficiency, availability and accuracy. The development of Bluetooth Low ... View full abstract»

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  • A Practical High Efficiency Video Coding Solution for Visual Sensor Network using Raspberry Pi Platform

    Publication Year: 2018, Page(s):64 - 68
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (407 KB) | HTML iconHTML

    Visual sensor network (VSN) has recently emerged as a promising solution for tremendous range of new vision-sensor based applications, from video surveillance, environmental monitoring to remote sensing. However, the practical VSN currently faces to the visual processing and transmitting problems due to the limitation of power at sensor nodes and the restriction of transmission bandwidth. In this ... View full abstract»

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  • Adaptive Long-Term Reference Selection for Efficient Scalable Surveillance Video Coding

    Publication Year: 2018, Page(s):69 - 73
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    The exponential growth of video surveillance has been asking for a more powerful video coding solution, which is characterized by not only the high compression efficiency but also the adaptive video streaming capability. The surveillance video content, however, usually contains a large number of background areas and having high temporal correlation between frames. In this context, we propose a nov... View full abstract»

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  • Light Field Image Coding for Efficient Refocusing

    Publication Year: 2018, Page(s):74 - 78
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (419 KB) | HTML iconHTML

    In video-based light field image coding, researchers often encode a selected subset of sub-aperture images (SAIs). The subset is heuristically selected as 9x9, 11x11, or 13x13 SAIs out of full 15x15 SAIs. Previous work has focused only on the compression efficiency without light field functionality such as refocusing. This paper evaluates the impact of selecting subset of SAIs not only on the comp... View full abstract»

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  • Adaptive Genetic Algorithm for Improving Prediction Accuracy of a Multi-Criteria Recommender System

    Publication Year: 2018, Page(s):79 - 86
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    Recommender systems are software tools used to make valuable recommendations to users. Traditionally, recommender systems use information obtained from ratings of an item by users with similar opinions to make recommendations. A user uses a single rating to represent the degree of likeness of an item in traditional recommender systems. Though this approach has reasonably shown a good prediction ac... View full abstract»

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