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2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL)

16-18 May 2018

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  • [Title page i]

    Publication Year: 2018, Page(s): 1
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  • [Title page iii]

    Publication Year: 2018, Page(s): 3
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  • [Copyright notice]

    Publication Year: 2018, Page(s): 4
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  • Table of Contents

    Publication Year: 2018, Page(s):5 - 9
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  • Preface

    Publication Year: 2018, Page(s): 10
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  • Organizing Committee

    Publication Year: 2018, Page(s): 11
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  • Program Committee

    Publication Year: 2018, Page(s): 12
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  • External Reviewers

    Publication Year: 2018, Page(s): 13
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  • Quaternary Generalized Boolean Bent Functions Obtained Through Permutation of Binary Boolean Bent Functions

    Publication Year: 2018, Page(s):1 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (182 KB) | HTML iconHTML

    Various generalizations of binary Boolean bent functions have some applications in both binary and multiple-valued domain. The generalized Boolean functions having binary variables but taking four different values are of a special interest due to simple realizations. In this paper, we study how relationships between binary bent functions and generalized Boolean bent functions with quaternary value... View full abstract»

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  • Quaternary Debiasing for Physically Unclonable Functions

    Publication Year: 2018, Page(s):7 - 12
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (566 KB) | HTML iconHTML

    This paper proposes a new multiple-valued debiasing method for extracting uniform random binary responses from physically unclonable functions (PUFs). The proposed method handles PUF responses as quaternary values and extracts the corresponding binary responses in a stable and ef?cient manner. Two experiments were conducted to evaluate the stability and effectiveness of the proposed method with si... View full abstract»

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  • Characterization of Quaternary Threshold Functions in the Vilenkin-Chrestenson Basis

    Publication Year: 2018, Page(s):13 - 18
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (182 KB) | HTML iconHTML

    This paper deals with the characterization of threshold functions defined on n-dimensional quaternary inputs using the representation of a function in the Vilenkin-Chrestenson basis. It is shown that such a function is uniquely characterized by (2n + 2)-dimensional vector of parameters, that correspond to the Vilenkin-Chrestenson spectrum. (2n + 1) of them correspond to the spectral coefficients o... View full abstract»

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  • Application of Multiple-Valued Logic in Importance Analysis of k-out-of-n Multi-state Systems

    Publication Year: 2018, Page(s):19 - 24
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (225 KB) | HTML iconHTML

    Multi-State Systems (MSSs) represent one of the basic approaches used in reliability analysis. They define several performance levels at which the system and its components can operate. A special type of a MSS is k-out-of-n system whose instances can be found in complex systems with redundant components, such as distribution networks. In this paper we deal with importance analysis of such systems ... View full abstract»

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  • An Analog-to-Digital Converter Using Delta-Sigma Modulator Network

    Publication Year: 2018, Page(s):25 - 30
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (375 KB) | HTML iconHTML

    An analog-to-digital converter (ADC) using a deltasigma modulator network is proposed, and signal-level simulations are carried out as a proof of concept. The present architecture is based on a feedforward artificial neural network, where an N-bit digital output is generated through N channels containing one comparator per channel. A moving average of delta-sigma modulator outputs is taken to obta... View full abstract»

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  • A Reconfigurable Arbiter PUF with 4 x 4 Switch Blocks

    Publication Year: 2018, Page(s):31 - 37
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (211 KB) | HTML iconHTML

    Physical Unclonable Functions (PUFs) exploit manufacturing process variation to create responses that are unique to individual integrated circuits (ICs). Typically responses of a PUF cannot be modified once the PUF is fabricated. In applications which use PUFs as a long-term secret key, it would be useful to have a simple mechanism for reconfiguring the PUF in order to update the key periodically.... View full abstract»

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  • Beyond Bits: A Quaternary FPGA Architecture Using Multi-Vt Multi-Vdd FDSOI Devices

    Publication Year: 2018, Page(s):38 - 43
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (311 KB) | HTML iconHTML

    In this article we present the architecture of a quaternary FPGA, its implementation in FDSOI technology, and a comparison with binary architectures based on VPR. We discuss the transistor level design of LUTs, Flip-Flops, Muxes, and multi-valued buffer circuits exploiting the capability of FDSOI technology to modify threshold voltages. We present I/O elements of such an FPGA with binary to quater... View full abstract»

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  • An Energy-Efficient Quaternary Serial Adder for Nanoelectronics

    Publication Year: 2018, Page(s):44 - 49
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1410 KB) | HTML iconHTML

    Increased power consumption of scaling Complementary Metal Oxide Semiconductor (CMOS) technology and the limitations of binary communication have led to the consideration of non-silicon multiple-valued logic (MVL) circuits. The unique properties of Carbon Nanotube Field Effect Transistors (CNTFETs) in circuit design, such as the capability of setting the desired threshold voltage by adjusting the ... View full abstract»

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  • On a Memory-Based Realization of Sparse Multiple-Valued Functions

    Publication Year: 2018, Page(s):50 - 55
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (183 KB) | HTML iconHTML

    This paper presents multi-valued (MV) functions, which are generalizations of index generation functions and switching functions. First, an efficient memory-based realization of sparse MV functions, where the number of specified combinations is much smaller than the number of possible input combinations, is presented. Then, a formula for the expected number of variables to represent random sparse ... View full abstract»

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  • Systematic Intrusion Detection Technique for an In-vehicle Network Based on Time-Series Feature Extraction

    Publication Year: 2018, Page(s):56 - 61
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (413 KB) | HTML iconHTML

    In this paper, we propose a systematic intrusion detection algorithm based on time-series feature extraction for an in-vehicle network. Since packet-type valid data are transmitted inside an in-vehicle network periodically, illegal data due to unauthorized intrusion attack can be easily and uniformly detected by using periodical time-series feature of valid data, where recurrent neural network is ... View full abstract»

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  • On the Detectability of Hardware Trojans Embedded in Parallel Multipliers

    Publication Year: 2018, Page(s):62 - 67
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (507 KB) | HTML iconHTML

    This paper presents a new method for analyzing the detectability of a hardware Trojan (HT) that has infected parallel multipliers. The proposed method handles the Rare Path Trojan (RPT) that exploits the difficulty in activating a specific path of a parallel multiplier. In this paper we analyze some typical multipliers from the viewpoints of RPT characteristics and insertion/detection possibility.... View full abstract»

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  • Mining Latency Guarantees for RTL Designs

    Publication Year: 2018, Page(s):68 - 73
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (219 KB) | HTML iconHTML

    Guaranteed response times are crucial for control applications. Analyzing the communication latency, i.e., the time needed to transfer data from one end-point to another, in complex on-chip communication architectures is hard. In this paper, we formally define the problem of mining latency guarantees and present a pragmatic approach to mine symbolic conditions that guarantee a latency requirement.... View full abstract»

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  • Track-Down Operations on Bilattices

    Publication Year: 2018, Page(s):74 - 79
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (217 KB) | HTML iconHTML

    This paper discusses a dualization of Fitting's notion of a "cut-down" operation on a bilattice, rendering a "track-down" operation, later used to represent the idea that a consistent opinion cannot arise from a set including an inconsistent opinion. The logic of track-down operations on bilattices is proved equivalent to the logic dSfde, dual to Deutsch's system Sfde. Furthe... View full abstract»

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  • One Class of Maximal Binary Monomials

    Publication Year: 2018, Page(s):80 - 84
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (174 KB) | HTML iconHTML

    The lattice of closed sets of monomials generated by a monomial of the form xy t over a finite field GF(k) is isomorphic to the lattice of divisors of k-1. If a monomial xy t generates a maximal element in that lattice, does it also generate a maximal element in the poset of closed sets generated by singleton binary monomials? This is the question studied in this paper. We have proven that over so... View full abstract»

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  • Commutation for Functions of Small Arity Over a Finite Set

    Publication Year: 2018, Page(s):85 - 90
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (213 KB) | HTML iconHTML

    Commutation is defined for multi-variable functions on a finite base set. For a set F of functions the centralizer F* of F is the set of functions which commute with all functions in F. For a function f a minor of f is a function obtained from f by iden- tifying some of its variables. An important observation is that the centralizer f* of f is a subclone of the centralizer of any minor of f, which... View full abstract»

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  • A Representation Theorem for Quantale Valued sup-algebras

    Publication Year: 2018, Page(s):91 - 96
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (186 KB) | HTML iconHTML

    With this paper we hope to contribute to the theory of quantales and quantale-like structures. It considers the notion of Q-sup-algebra and shows a representation theorem for such structures generalizing the well-known representation theorems for quantales and sup-algebras. In addition, we present some important properties of the category of Q-sup-algebras. View full abstract»

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  • Synthesis of Reversible Circuits Using Conventional Hardware Description Languages

    Publication Year: 2018, Page(s):97 - 102
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (192 KB) | HTML iconHTML

    Hardware Description Languages (HDL) facilitate the design of complex circuits and allow for scalable synthesis. While rather established for conventional circuits, HDL-based design of reversible circuits is in its infancy. This motivates the question whether conventional HDLs can also be efficiently used for the design of reversible circuits. This work investigates this question and provides a ba... View full abstract»

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