Scheduled System Maintenance
On Tuesday, January 22, IEEE Xplore will undergo scheduled maintenance from 1:00-4:00 PM ET
During this time, there may be intermittent impact on performance. We apologize for any inconvenience.

IEE Colloquium on High Performance Architectures for Real-Time Image Processing

12-12 Feb. 1998

Filter Results

Displaying Results 1 - 16 of 16
  • IEE Colloquium on High Performance Architectures for Real-Time Image Processing (Ref. No.1998/197)

    Publication Year: 1998
    IEEE is not the copyright holder of this material | PDF file iconPDF (93 KB)
    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A 3-D re-configurable image processing element

    Publication Year: 1998, Page(s):1/1 - 1/7
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (532 KB)

    Image processing is generally computationally intensive, and has, traditionally, required high-speed ASICs to produce acceptable real-time speeds. The use of a general-purpose computer (GPC) allows simple verification of an algorithm, but not usually real-time processing. Using an ASIC accelerator with a GPC can yield good performance, however it may have limited functionality due to the pre-defin... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A new processor architecture exploiting ILP with a reduced instruction word

    Publication Year: 1998, Page(s):2/1 - 2/5
    Cited by:  Papers (1)  |  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (376 KB)

    Explores a parallel processor keeping low hardware complexity while reducing the size of the instruction word. This is obtained by using an indirect instruction coding: the most frequently executed instructions are first stored in an Instruction Register File (IRF) so that the address in the IRF can then be fetched instead of the entire instruction word. It will allow to develop a VLIW-based proce... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A generic scaleable image processing architecture for real-time military applications

    Publication Year: 1998, Page(s):3/1 - 3/6
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (586 KB)

    This paper presents the design of a general-purpose, real-time image processing architecture, required for developing proof of principle demonstrations of military image processing applications. The main requirements of the architecture are to provide a scaleable, modular parallel processing framework, with very high bandwidth (at least 64 MByte s/sup -1/) point to point interprocessor communicati... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Comparison of a programmable DSP and a FPGA for real-time multiscale convolution

    Publication Year: 1998, Page(s):4/1 - 4/6
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (802 KB)

    Real time image and signal processing is becoming increasingly important in today's military arena for functions such as tactical and strategic surveillance, surface and airborne target acquisition and tracking, self guided armaments, and remote or autonomously guided vehicles. Many application areas where a real time processing solution is required impose considerable constraints on physical size... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Rapid design of discrete cosine transform cores

    Publication Year: 1998, Page(s):5/1 - 5/6
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (542 KB)

    The broader use of DCT circuits underlines the need for a more systematic and generalised approach to silicon DCT design. In addition, increasing commercial pressures, particularly in areas such as multi-media, broadcasting and telecommunications systems strongly motivate the need to develop methods for the rapid design and portability of application specific cores to create new generations of DSP... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A simple and efficient VLSI architecture for a very fast high performance three step search algorithm

    Publication Year: 1998, Page(s):6/1 - 6/6
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (451 KB)

    In this paper, we design a simple and efficient VLSI architecture for a novel very fast high performance three step search (FHTSS) algorithm that is superior to the existing three step search (TSS) algorithm in all cases and also to the recently proposed new three step search (NTSS) algorithm when used for low bit-rate video coding, as with the H.261 standard. Based on a VLSI tree processor and an... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Image and signal processing on the SIMD DAP Gamma II

    Publication Year: 1998, Page(s):7/1 - 7/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (341 KB)

    The DAP Gamma II is an SIMD computer of either 1024 or 4096 processors (PEs) which can be used as a component in a real-time system. The DAP can be programmed in a mix of high level languages (Fortran-Plus and C++), low level languages, and library functions. For easy development of image and signal applications, there is also a development system based on Khoros. Various high-speed I/O interfaces... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Co-design by parallel prototyping: optical-flow detection case study

    Publication Year: 1998, Page(s):8/1 - 813
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (844 KB)

    Current OF routines have achieved greater accuracy over larger speeds by improvements in implementation. Unfortunately, the improvements require the processing of more image frames or larger spatial regions. General-purpose (gp) multicomputers can be deployed to reduce the timings recorded on workstations. The four methods parallelised herein are not unusual amongst OF methods in being amenable to... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Hardware compilation technology for embedded image processing

    Publication Year: 1998, Page(s):9/1 - 9/6
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (576 KB)

    There are an increasing number of applications of automated image analysis in which imaging is part of an instrumentation or process control system. A variety of industrial processes, including quality control and assembly, robotic, security and other applications make use of machine vision. Such embedded applications often require performance to be tuned in various ways to satisfy time constraint... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A specific pole placement technique to minimise hardware requirements within a real time terrestrial and cable video echo canceller

    Publication Year: 1998, Page(s):10/1 - 10/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (550 KB)

    The real time hardware architecture of a deterministic video echo canceller (deghoster) system is presented. The deghoster is capable of calculating all the multipath channel distortion characteristics from terrestrial and cable television in one single pass while performing real time video in-line ghost cancellation. The results from the actual system are also presented in this paper. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Real-time face recognition with the continuous n-tuple classifier

    Publication Year: 1998, Page(s):11/1 - 11/7
    Cited by:  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (528 KB)

    The continuous n-tuple classifier was recently proposed by the author as a new type of n-tuple classifier that is ideally suited to problems where the input is continuous or multi-level rather than binary. Results on a widely used face database show the continuous n-tuple classifier to be as accurate as any method reported in the literature, while having the advantages of speed and simplicity over... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Real-time motion detection of crowds in video signals

    Publication Year: 1998, Page(s):12/1 - 12/6
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1330 KB)

    A real-time motion detection system consisting of two PCI bus plug and play cards has been developed. The PCI bus is employed as a video bus to transfer digitised video information to the motion estimation board. The motion vectors are continuously delivered to the host via the PCI bus in a DMA transfer mode. The process was developed under the Windows 95 operating system and it was tested with a ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A real-time colour transformation architecture

    Publication Year: 1998, Page(s):13/1 - 13/6
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (821 KB)

    There are two requirements for computer graphics and image processing. First, the need to specify colours in a way that is compatible with the hardware used. Second, the results should be comprehensible to the user. With this in consideration and with the availability of low cost colour imaging devices it is possible to develop low cost imaging systems for routine applications. With the densities ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An interactive medical image processing system based on a hybrid computer architecture

    Publication Year: 1998, Page(s):14/1 - 14/6
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (623 KB)

    The paper presents an interactive segmentation system that uses a parallel processing architecture. Poor contrasts, variable tissue properties and complex-shaped structures make the isolation of meaningful regions of interest difficult. The interactive approach uses the human user's knowledge base to assist in image segmentation. The measurement of regions of interest enable the resultant output i... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Feature extraction algorithms using FPGA technology

    Publication Year: 1998, Page(s):15/1 - 15/6
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (396 KB)

    This paper reviews the implementation of two feature extraction algorithms built using FPGA technology. The algorithms, based on moment invariants and the rapid transform, have been chosen to illustrate the potential of this technology for implementing simple but computationally intensive algorithms for object identification, scene matching and character recognition. In the past such circuits have... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.