IEE Colloquium on Hardware-Software Cosynthesis for Reconfigurable Systems

22-22 Feb. 1996

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Displaying Results 1 - 9 of 9
  • Closing the gap between hardware and software: hardware-software cosynthesis at Oxford

    Publication Year: 1996, Page(s):2/1 - 211
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (595 KB)

    We present on overview of the work of the Hardware Compilation Research Group at Oxford on hardware-software cosynthesis. We refer to the ongoing work to develop a single framework for expressing programs which can be efficiently mapped into either hardware or software. Our supporting work on reconfigurable computing platforms is also briefly described. Our Handel-C language for hardware compilati... View full abstract»

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  • The cosynthesis of C using assembly extraction

    Publication Year: 1996, Page(s):3/1 - 3/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (389 KB)

    The work described is related to a technique called software acceleration where key functions of a software program are mapped into an FPGA in order to speed up the overall application. Cosynthesis is a major element in this process. This paper presents a radical technique for cosynthesis where, instead of starting with the original software description, the output of a compiler is processed to ge... View full abstract»

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  • Syntax driven approach for RTL hardware synthesis of parallel programs

    Publication Year: 1996, Page(s):4/1 - 416
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1252 KB)

    The Handel hardware compilation language, is designed and used for hardware specification and synthesis in the Computing Laboratory of Oxford University. It is very similar to a subset of occam and a meta-language environment is utilized to map abstract program syntax trees of Handel into functionally equivalent hardware netlists. The Handel compilation represents itself a syntax-directed strategy... View full abstract»

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  • Exploiting reconfigurability through high level synthesis

    Publication Year: 1996, Page(s):5/1 - 5/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (449 KB)

    In the late 1970's and early 1980's there was considerable interest in the use of so-called systolic architectures for the design of cost-effective, high throughput and high performance VLSI architectures. At the time there was a great deal of governmental pressure to produce high performance custom devices to overcome traditional computational bottlenecks such as memory processor bandwidths. Syst... View full abstract»

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  • Profiling of SIGNAL programs and its application in the timing evaluation of design implementations

    Publication Year: 1996, Page(s):6/1 - 6/9
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (826 KB)

    We present a tool currently under construction in order to enhance the SIGNAL language environment with a facility that will allow the temporal validation of a system specification with respect to its R/T constraints while staying within the context of the SIGNAL language. By use of the so called temporal homomorphisms we express the temporal dimension of a functional specification as a SIGNAL pro... View full abstract»

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  • LOPIOM [programmable logic with outrageously massive interconnection]

    Publication Year: 1996, Page(s):7/1 - 7/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (565 KB)

    As the number of applications combining hardware and software steadily grows, the need for tools dedicated to co-design and co-synthesis is becoming more and more urgent. This paper describes a target platform designed to prototype this kind of application and to serve as a basis for the development and test of CAD tools. View full abstract»

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  • AKKA: a tool-kit for cosynthesis and prototyping

    Publication Year: 1996, Page(s):8/1 - 8/8
    Cited by:  Patents (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (594 KB)

    Shortened design and lifetime of embedded systems has motivated active research in HW/SW co-design area, together with evolution of relatively long-life of reconfigurable HW. In this paper we present AKKA-a set of tools for design space exploration, co-simulation and co-synthesis with two industrial examples from the telecommunication field-Maintenance functionality of the ATM protocol and Channel... View full abstract»

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  • Configuration controller synthesis for dynamically reconfigurable systems

    Publication Year: 1996, Page(s):9/1 - 9/9
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (770 KB)

    The availability of FPGAs has changed the process of digital design. Dynamically reconfigurable systems are at the forefront of these changes. It is now possible to programme new hardware circuits into a digital integrated circuit while other circuitry on the same device continues to function without any degradation in the performance of the static circuitry. These new digital systems present many... View full abstract»

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  • Hardware-software cosynthesis for the Riley system

    Publication Year: 1996, Page(s):10/1 - 10/5
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (668 KB)

    Electronic systems containing application specific hardware working alongside an embedded microprocessor are now common place. However, to design such systems quickly and reliably, while exploring the design space sufficiently to ensure near optimal solutions presents many new challenges. The problem is further complicated by reconfigurable hardware such as FPGAs some of which can be dynamically r... View full abstract»

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