Issue 6 • Nov.-Dec. 2018

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  • Front Cover

    Publication Year: 2018, Page(s): C1
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  • Social Networking Ad

    Publication Year: 2018, Page(s): C2
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  • Masthead

    Publication Year: 2018, Page(s): 1
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  • Table of Contents

    Publication Year: 2018, Page(s):2 - 3
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  • Column: From the Editor in Chief 
  • Hardware Acceleration and a Grateful Goodbye

    Publication Year: 2018, Page(s):4 - 5
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  • Guest Editors' Introduction: Hardware Acceleration 
  • Hardware Acceleration

    Publication Year: 2018, Page(s):6 - 7
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  • Theme Article: Hardware Acceleration 
  • Optimized Solution to Accelerate in Hardware an Intra H.264/SVC Video Encoder

    Publication Year: 2018, Page(s):8 - 17
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (679 KB) | HTML iconHTML

    This paper introduces a real-time intra H.264/SVC encoder CMOS 180 nm implementation. Results confirmed it as an efficient approach that is able to encode up to 16 layers for 1080p videos at 30 fps. View full abstract»

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  • Galapagos: A Full Stack Approach to FPGA Integration in the Cloud

    Publication Year: 2018, Page(s):18 - 24
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    Field-programmable gate arrays (FPGAs) have shown to be quite beneficial in the cloud due to their energy-efficient application-specific acceleration. These accelerators have always been difficult to use and at cloud scale, the difficulty of managing these devices scales accordingly. We approach the challenge of managing large FPGA accelerator clusters in the cloud using abstraction layers and a n... View full abstract»

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  • A Communication-Centric Approach for Designing Flexible DNN Accelerators

    Publication Year: 2018, Page(s):25 - 35
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (1397 KB) | HTML iconHTML Multimedia Media

    High computational demands of deep neural networks (DNNs) coupled with their pervasiveness across cloud and IoT platforms have led to the emergence of DNN accelerators employing hundreds of processing elements (PE). Most DNN accelerators are optimized for regular mapping of the problems, or dataflows, emanating from dense matrix multiplications in convolutional layers. However, continuous innovati... View full abstract»

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  • Accelerators and Coherence: An SoC Perspective

    Publication Year: 2018, Page(s):36 - 45
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    The complexity of System-on-Chip (SoC) designs continues to grow as each SoC features an increasing variety of loosely coupled accelerators together with multiple processor cores. Specialized-hardware accelerators are typically designed in isolation, optimized for the algorithm they are implementing, and with limited consideration of the implications of their integration into a given SoC. However,... View full abstract»

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  • Safety-Related Challenges and Opportunities for GPUs in the Automotive Domain

    Publication Year: 2018, Page(s):46 - 55
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (383 KB) | HTML iconHTML

    GPUs have been shown to cover the computing performance needs of autonomous driving (AD) systems. However, since the GPUs used for AD build on designs for the mainstream market, they may lack fundamental properties for correct operation under automotive's safety regulations. In this paper, we analyze some of the main challenges in hardware and software design to embrace GPUs as the reference compu... View full abstract»

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  • Department: Expert Opinion 
  • Accelerator Architectures —A Ten-Year Retrospective

    Publication Year: 2018, Page(s):56 - 62
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (608 KB) | HTML iconHTML

    This article is a ten-year retrospective of the rise of the accelerators since the authors coedited a 2008 IEEE MICRO special issue on Accelerator Architectures. It identifies the most prominent applications using the accelerators to date: high-performance computing, crypto currencies, and machine learning. For the two most popular types of accelerators, GPUs and FPGAs, the article gives a concise... View full abstract»

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  • Feature Article: Approximate Computing 
  • Toward Approximate Computing for Coarse-Grained Reconfigurable Architectures

    Publication Year: 2018, Page(s):63 - 72
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (1516 KB) | HTML iconHTML

    This paper presents a methodology for designing an approximate coarse-grained reconfigurable architecture (X-CGRA), and its use for accelerating both error-resilient and error-sensitive applications. The output quality of the X-CGRA is manageable at the run-time for better performance and power/energy consumption tradeoffs. Results show up to 1.9× speedup and 2.3× lower energy consumption at the c... View full abstract»

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  • Design of Programmable Analog Calculation Unit by Implementing Support Vector Regression for Approximate Computing

    Publication Year: 2018, Page(s):73 - 82
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (686 KB) | HTML iconHTML

    In this work, we design a programmable analog calculation unit (ACU) for approximately computing arbitrary functions with two operands. By implementing an efficient scheme of support vector regression, the target functions are retrieved by very large scale integrated circuits in one clock cycle with only 600 transistors. A set of dynamically tunable analog circuits are designed for generating vari... View full abstract»

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  • Department: Awards 
  • 2018 Maurice Wilkes Award Given to Gabriel Loh

    Publication Year: 2018, Page(s):83 - 84
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  • DEPARTMENT: Errata 
  • Erratum to “Defect-Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation”

    Publication Year: 2018, Page(s): 85
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (95 KB) | HTML iconHTML

    In the article “Defect-Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation,” by Onur Tunali, M. Ceylan Morgul, and Mustafa Altun,1 in reference 4, the year should be 2018 (not 2005). View full abstract»

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  • Column: Micro Economics 
  • Organized for Cycles of Change

    Publication Year: 2018, Page(s):86 - 88
    Request permission for reuse | Click to expandAbstract | PDF file iconPDF (116 KB) | HTML iconHTML

    The author discusses the following questions about the IT market: Why is the commercial IT market organized unlike other markets? That is more challenging to answer than you would think. The IT market seems to change more quickly than other industries, and it seems to use frontier technologies more often. Neither trait is unique to IT, however, financial markets change quickly. Biotech uses fronti... View full abstract»

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  • IEEE Computer Society Information

    Publication Year: 2018, Page(s): C3
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  • Membership Ad

    Publication Year: 2018, Page(s): C4
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Aims & Scope

IEEE Micro addresses users and designers of microprocessors and microprocessor systems, including managers, engineers, consultants, educators, and students involved with computers and peripherals, components and subassemblies, communications, instrumentation and control equipment, and guidance systems.

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Meet Our Editors

Editor-in-Chief
Lizy K. John
University of Texas, Austin
ljohn@ece.utexas.edu