IEE Colloquium on High Level Modelling and Design for ASICs

27-27 Oct. 1989

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  • IEE Colloquium on 'High Level Modelling and Design for ASICs' (Digest No.120)

    Publication Year: 1989
    IEEE is not the copyright holder of this material | PDF file iconPDF (18 KB)
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  • Gate array design: a case study

    Publication Year: 1989, Page(s):1/1 - 1/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (232 KB)

    The art of getting an ASIC design to a working component is always difficult but can be achieved with maximum success by the right people, tools, management skills, specification, time-scales, vendor and necessary budget. This paper is about the problems and how to achieve maximum success.<<ETX>> View full abstract»

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  • Simulating digital circuits on transputers

    Publication Year: 1989, Page(s):2/1 - 2/5
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (324 KB)

    While attempts have been made to increase the power of simulators, little regard has been paid to the cost of the result of this work. It will be true to say, though, that a company involved in many digital designs will-in many cases-be prepared to pay large sums for greater throughput. There is still a requirement, though, for organisations that cannot justify the cost of a hardware accelerator, ... View full abstract»

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  • Design automation based upon a distributed self-timed architecture

    Publication Year: 1989, Page(s):34 - 33
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (207 KB)

    This paper describes a design automation tool for digital systems, ZP, which incorporates both system level correctness checking of control and data flow and automatic translation to a hardware or software target. It differs from typical 'silicon compiler' tools both in the provision of analytical routines which detect characteristics such as correct termination and freedom from indeterminacy and ... View full abstract»

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  • High level behavioural modelling and simulation of mixed analogue-digital ASICs

    Publication Year: 1989, Page(s):4/1 - 4/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (208 KB)

    This paper describes ongoing work within LSI Logic on high level analogue behavioural modelling for application to the design of its mixed analogue-digital ASICs. It is implemented in the proprietary Behavioral Specification Language (BSL), which has similar capabilities to the behavioural view of VHDL. The models thus developed are simulated using LSI Logic's behavioural simulator BSIM.<<ET... View full abstract»

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  • Using knowledge-based systems with CAD

    Publication Year: 1989, Page(s):5/1 - 5/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (284 KB)

    The use of 'Knowledge based systems' (KBS) in CAD has been talked about and a few example systems produced over the last 5 years. These examples are nearly all small University produced systems rather than industrial applications. The CAD industry has perhaps correctly recognised but 'hype' and reality are often very different. The majority of successful KBS have been very limited in the domain to... View full abstract»

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  • System 1076-a graphical VHDL design environment

    Publication Year: 1989, Page(s):6/1 - 6/3
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (162 KB)

    VHDL is a hardware description language 'intended for use in all phases of the creation of electronic systems' which was initially sponsored by the America DoD and has since been adopted as standard number 1076-1987 by the IEEE. The quote above is taken from the preface to the IEEE specification document, published in 1987. Commercial acceptance of VHDL is growing rapidly, as shown by the endorsem... View full abstract»

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  • Logic synthesis from a hardware description language

    Publication Year: 1989, Page(s):7/1 - 7/8
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (490 KB)

    Describes the benefits of synthesizing from a hardware description language (HDL). The features of an HDL which make it suitable as a front-end for a synthesis tool are also illustrated using a simple circuit which has been coded up in the HDL ELLA. Comparisons are made between declarative languages, in particular ELLA, and imperative languages, particularly C-based HDLs. This paper gives an up to... View full abstract»

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  • Behavioural and structural synthesis system

    Publication Year: 1989, Page(s):8/1 - 8/4
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (198 KB)

    This paper presents a design method based on a top-down behavioural-to-structural synthesis system. The design framework supports the automated synthesis of structural descriptions in the ELLA hardware description language from behavioural description of systems in Occam. The emphasis of the approach is to capture individual design styles by giving the designer more control over the end product th... View full abstract»

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  • Formal system design

    Publication Year: 1989, Page(s):9/1 - 9/3
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (204 KB)

    Current CAD tools represent and manipulate structure. Behaviour is only represented indirectly and inflexibly. Tools which can manipulate behaviours will provide the engineer with a new level of design assistance. The author developing formal methodologies for system-level design which are amenable to machine support. Theorem proving technology is now capable of specifying and verifying the behavi... View full abstract»

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