Variable input biasing as applied to pulse response testing of digital integrated circuits

This paper presents new test results for detecting defects in digital integrated circuits by the changes observed in the power on/off transient currents for device under test [DUT]. This technique is called i/sub DD/ Pulse Response Testing (i/sub DD/PRT). Hardware test results for the Sandia National Laboratories SA3865 radhard emulation of the Intel 80C51BH micro-controller are presented which demonstrate the potential effectiveness of the test. Comparison of the power-on transient (rise time) and power of transient (fall time) using the mean and the variance as the classifier are presented. Also variable input biases are investigated and the results are presented.