A mid-infrared imaging test-bed for TRW's superconducting analog to digital converter

For the purpose of testing and demonstrating the practical implementation of TRW's superconducting analog to digital converter (ADC) in an imaging system, JPL is developing a test-bed which the superconducting ADC is integrated within a mid-infrared camera. This paper describes the overall system architecture with some emphasis on the design challenges that have been overcome in developing the test-bed. Upon completion, the test-bed will be capable of characterizing the performance of various types of cryogenic ADCs within a realistic imaging application. Of particular note, the system can accommodate digitization rates of up to 40 million pixels per second with a resolution of up to 24 bits per pixel. Additionally, the acquisition electronics can handle a single bit-serialized digital data stream from the ADC. This is key in minimizing the thermal insulation complications introduced by having multiple output lines. On the receiving end of the data stream, the data acquisition computing system has been designed to have the necessary throughput speed and capacity to continuously acquire a few thousand image frames without missing any data. Performance system required computing processed images for real-time display.