400-Picosecond monolithic current switch

Development of a monolithic circuit current switch in silicon with switching times of 400 picosecond is described. (This speed includes 110-picosecond package delay.) The circuit uses junction isolation and employs two levels of metallization. The transistors used in the circuit have 0.000075"-wide emitter and 0.000075" emitter-to-base spacing. The transistors are made through double-diffusion techniques, and the collector and emitter junction depths are, respectively, 3200 Å and 2000 Å. The collector base junction capacitance is 0.58 pf and the emitter base junction capacitance is 0.28 pf. The cut-off frequency of these transistors is 7.15 GHz at I
C
= 20 ma and V
CB
= 2.0 volts. Computer-simulated transistor design techniques were used to optimize the transistor design. The major factors influencing the design were (a) mobile charge storage in the forward biased emitter-base junction, (b) optimum emitter area to handle the required current, (c) crowding of the current under the emitter and (d) effect of junction depth on the transistor speed.