Novel high growth rate processes for depositing poly-SiGe structural layers at CMOS compatible temperatures

This paper describes two novel processes for depositing poly-SiGe films at CMOS-compatible temperatures (/spl les/450/spl deg/C). A range of deposition temperatures is investigated to ensure compatibility with different CMOS generations. While the multilayer process investigates temperatures ranging between 420-450/spl deg/C, the microcrystalline SiGe deposition has been made possible at temperatures as low as 300/spl deg/C. These films are optimized to obtain low stress and stress gradient values suitable for MEMS structural layers. Low SiGe-Al contact resistivity on the order of 10/sup -7/ /spl Omega/.cm/sup 2/ and film resistivity as low as 1 m/spl Omega/.cm were achieved as well.