ESD‐RFIC Co‐Design

This chapter discusses the complex electrostatic discharge (ESD) circuit interactions in details. ESD–RFIC co‐design becomes a critical design concept for advanced RF ICs with on‐chip ESD protection. The chapter discusses the ESD–RFIC co‐design methodology and the IC‐to‐ESD influences and the ESD‐to‐IC influences, respectively, which comprise the ESD–IC interactions (a.k.a., ESD–RFIC interactions). Depending upon a specific RF IC, even very “tiny” ESD‐induced parasitic effect may still have non‐negligible impact on circuit performance, which is particularly true as RF ICs moving into extremely high frequency (e.g., millimeter wave band), ultrawide band (e.g., 7.5 GHz UWB band), and very high data rate (e.g., 10–130 Gbps and beyond) domain. This RF ESD design challenge can be addressed by a novel ESD‐RFIC co‐design technique discussed in this chapter.