Digital Control of a Three-Phase Two-Level Grid-Connected Inverter

This chapter presents the design and practical implementation of a digital current controller for a three-phase 2 level voltage source PWM inverter connected to the grid via an LCL filter. A two feedback loops control system is proposed, with an outer grid current loop and an inner filter capacitor current loop. The controller also incorporates a grid voltage feedforward loop to compensate for the effect of the utility voltage disturbance. The chapter also discusses the effect of sampling and computational time delay both on system stability and current quality. The time delay is shown to reduce the stability of the inner loop. However, it is also shown that it is better, from the point of view of output current THD quality, to increase the inner loop time delay to a full one sampling period, so that the mains frequency envelope (nearly ripple free) current component is sampled at the peaks and troughs of the PWM, away from the switching instances (and associated noise) of the transistors. To ensure system stability, a capacitor current observer is proposed to compensate for the computational time delay. The design of the capacitor current observer and the controller are discussed. Simulation and practical results are presented to validate the design.