Scheduled System Maintenance
On Tuesday, May 22, IEEE Xplore will undergo scheduled maintenance. Single article sales and account management will be unavailable
from 6:00am–5:00pm ET. There may be intermittent impact on performance from noon–6:00pm ET.
We apologize for the inconvenience.

Circuit-Level Design, Implementation, and Verification

Sign In

Full text access may be available.

To access full text, please use your member or institutional sign in.

Formats Non-Member Member
$31.0 $31.0
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, books, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)

This chapter gives some design issues and practical recipes to complete the design flow of ?>?> modulator. It deals with macromodel implementation of ?>?>Ms as an essential design stage to relate behavioral-level models with circuit-level description. Then, it describes how to include circuit noise in electrical-level simulations of ?>?>Ms, and shows how to process the modulator output data extracted from electrical simulations in SPICE-like simulators, in order to characterize the performance of ?>?>Ms. Next, the chapter moves down to the transistor-level implementation, giving a number of practical design guidelines and describing diverse simulation test benches to properly design and characterize the performance of basic ?>?> building blocks (CMOS Switches, operational amplifiers, transconductors, comparators, and current-steering DACs). Other auxiliary circuits needed to implement ?>? >Ms are also discussed. Finally, the chapter deals with some of the most important design issues related to the layout, prototyping, and testing of high-performance ?>?>Ms.