Design and operation of data switching circuits for a superconductive three-node parallel processor interconnection system

We have proposed a superconductive packet switching interconnection circuit for a three-node parallel processor system. At each node, the processor unit communicates with the others through a ring interface circuit (called RIF circuit). In this paper, we report the design of the switching protocols of the RIF circuit and the result of an operation experiment on each protocol. The protocols operate successfully at 20 kHz. Additionally, the functions of checking validity and setting validity of the packet operate successfully at over 1 GHz.