Scaling strategy for low power RF applications with multi gate oxide Dual Work function (DWF) MOSFETs utilizing self-aligned integration scheme

Dual Work Function (DWF)-MOSFET of 100 nm gate length device with self-aligned integration scheme was demonstrated utilizing conventional CMOS platform process for the first time. Here, we obtained not only the improved transconductance (GM) and drain conductance (GD), but also the enlarged operation voltage window employing multi gate oxide structure combined with DWF gate stack. Also, the discriminative features of DWF-MOSFET operation were revealed by TCAD analysis indicating the potential ability of reduced power consumption for RF applications.