By Topic

An Analog Sub-Miliwatt CMOS Image Sensor With Pixel-Level Convolution Processing

Sign In

Full text access may be available.

To access full text, please use your member or institutional sign in.

The purchase and pricing options are temporarily unavailable. Please try again later.
5 Author(s)
W. Jendernalik ; Faculty of Electronics, Telecommunications and Informatics, Gdansk University of Technology, Gdansk, Poland ; G. Blakiewicz ; J. Jakusz ; S. Szczepanski
more authors

A new approach to an analog ultra-low power medium-resolution vision chip design is presented. The prototype chip performs low-level image processing algorithms in real time. Only a photo-diode, MOS switches and two capacitors are used to create an analog processing element (APE) that is able to realize any convolution algorithm based on a full 3 × 3 kernel. The proof-of-concept circuit is implemented in 0.35 μm CMOS technology, and contains a 64 × 64 SIMD matrix with embedded APEs. The matrix dissipates less than 0.3 mW (less than 0.1 W per APE) of power under 3.3 V supply, and its image processing speed is up to 100 frames/s.

Published in:

IEEE Transactions on Circuits and Systems I: Regular Papers  (Volume:60 ,  Issue: 2 )