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Algorithms and Architectures for the Design of a VLSI Reed-Solomon Codec

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2 Author(s)
Stephen B. Wicker ; Vijay K. Bhargava

This chapter contains sections titled:

  • Introduction

  • Reed-Solomon Codes

  • Arithmetic Operations in GF(2 m )

  • Encoding

  • Decoding

  • Hardware Implementation: An Example Design of an RS (31, k) Codec

  • Concluding Remarks

This chapter contains sections titled:

  • References

  • Acknowledgement

Publisher :
Wiley-IEEE Press
Edition :
1
Pages :
336
Copyright Year :
1994
ISBN :
9780470546345
DOI :
10.1109/9780470546345.ch5

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