Verifying SRAM designs

Verifying the design and simulation of 256 K SRAM relies on measurements of waveforms on internal nodes along a critical path. A technique for producing accurate measurements of these waveforms using electron-beam probing is described. Comparisons of measured and simulated waveforms at several points on a chip are presented. It is shown that the measured signals agree with the simulation in regard to risetime, amplitude, and time delay along the path, thereby verifying the correctness of the device and circuit models used in the simulation. Slight deviations from the predicted time delay are the result of circuit design and process variations.<
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