Thermal Characteristics of Plastic Small Outline Transistor (SOT) Packages

Surface mount plastic packages, including small outline transistor (SOT), small outline integrated circuit (SOIC), and plastic leaded chip carrier (PLCC), are projected to be the next generation replacement for plastic dual in-line packages (DIP's). Relative to DIP's, surface mount packages are small in size and allow higher package density on a hoard, leading to higher electrical speed for system applications. However, their small size and high density mounting in close proximity to each other make thermal management more difficult. Thermal characteristics of one class of plastic surface mount packages, namely, small outline transistor 23 and 89 packages will be addressed. The most striking feature of these packages is their small size, meaning the effective package diameter is on the same order of magnitude as the board thickness. Junction to ambient thermal resistance of these packages is less sensitive to package parameters, such as thermal conductivity of leadframe, molding compound, die bond, and chip size, than to variations in local printed circuit (PC) board temperature rise. About 80 percent of the surface mount package heat flows into the board at modest board temperatures, making the local mounting environment the greatest influence on thermal resistance. Experimental thermal resistance data for single component plastic SOT-23 and SOT-89 packages are reported. Both electrical parametric and infrared (IR) techniques were used to measure these quantities. The most noteworthy observation is that the external thermal resistance is about 2/3 of the total thermal resistance and thus controls the package's thermal behavior. The effect of density of mounting on thermal resistance of the packages is measured by IR imaging experiments. Package pitch, relative orientation of neighboring packages, and one-sided versus double-sided mountings are parameters that were varied in these experiments.