A New Transistor Bonding Technique for Hybrid IC's-Lifted Lead Transistor

A new transistor structure for hybrid integrated circuits(IC's) operating at ultrahigh frequency is proposed as a bare transistor bonding technique. This is called the lifted lead transistor (LLT). The LLT can be thought of as a beam-lead transistor with improved electrical and thermal characteristics. Stray capacitances under beam-lead electrodes are reduced by using the lifted lead structure. Thermal resistance from the junction to the substrate is also reduced by using thick gold plating on the back of the chip. In application un an f
T
= 8 GH
Z
transistor, there is good agreement in the high-frequency electrical characteristics with that of an intrinsic transistor when compensated for by the influence of parasitic impedance at the leads. Using a current mode logic (CML) switching circuit the rise and fall times are less than 300 ps, and the ringing is less than five percent. Little disorder, such as over-shoot and under-shoot, is observed in the switching wave form, justifying the small parasitic elements influences. Low thermal resistance from the junction to the substrate of approximately 40°C/W is achieved with a power LLT having an f
T
= 2.5 GH
Z
P
C
= 1.5 W. This value is about one-fifth of that of a conventional beam-lead transistor. In regard to reliability, it was found that the influence from stresses in the thick gold plating, which may affect h
FE
degradation, was removed by annealing at 350°C in N
2
.