IRE Transactions on Electronic Computers

The COordinate Rotation DIgital Computer(CORDIC) is a special-purpose digital computer for real-time airborne computation. In this computer, a unique computing technique is employed which is especially suitable for solving the trigonometric relationships involved in plane coordinate rotation and conversion from rectangular to polar coordinates. CORDIC is an entire-transfer computer; it contains a ... View full abstract»

The high-order probabilities of element sequences can be determined from a sample of linear structures and can be used for synthesis of new structures. From theoretical considerations one can identify the qualitative conditions for satisfactory output. The theoretical concepts can be tested and quantitative parameters determined by experiment. Such an experiment has been performed by analyzing wri... View full abstract»

A method is described which permits the encoding of arbitrary geometric configurations so as to facilitate their analysis and manipulation by means of a digital computer. It is shown that one can determine through the use of relatively simple numerical techniques whether a given arbitrary plane curve is open or closed, whether it is singly or multiply connected, and what area it encloses. Further,... View full abstract»

This paper describes a class of number representations which are called signed-digit representations. Signed-digit representations limit carry-propagation to one position to the left during the operations of addition and subtraction in digital computers. Carry-propagation chains are eliminated by the use of redundant representations for the operands. Redundancy in the number representation allows ... View full abstract»

The algorithm described in this paper is the outcome of an endeavor to answer the following question: Is it possible to find procedures which would enable a computer to solve efficiently path-connection problems inherent in logical drawing, wiring diagramming, and optimal route finding? The results are highly encouraging. Within our framework, we are able to solve the following types of problems: ... View full abstract»

A method of computer multiplication and division is proposed which uses binary logarithms. The logarithm of a binary number may be determined approximately from the number itself by simple shifting and counting. A simple add or subtract and shift operation is all that is required to multiply or divide. Since the logarithms used are approximate there can be errors in the result. An error analysis i... View full abstract»

Algorithms are presented for 1) converting a state graph describing the behavior of an automaton to a regular expression describing the behavior of the same automaton (section 2), and 2) for converting a regular expression into a state graph (sections 3 and 4). These algorithms are justified by theorems, and examples are given. The first section contains a brief introduction to state graphs and th... View full abstract»

The paper presents a factual account of the trip of the 1959 U. S. technical delegation in computers to the Soviet Union. It includes the itinerary, descriptions of specific Soviet computers, descriptions of certain computing centers, a discussion of Soviet computer-oriented education, and a description of current circuit and component development. In appendices are given the instruction repertoir... View full abstract»

A novel number system called the residue number system is developed from the linear congruence viewpoint. The residue number system is of particular interest because the arithmetic operations of addition, subtraction and multiplication may be executed in the same period of time without the need for carry. The main difficulties of the residue code pertain to the determination of the relative magnit... View full abstract»

Logical circuits using Esaki diodes, and which are based on a principle similar to parametron (subharmonic oscillator element) circuits, are described. Two diodes are used in series to form a basic element called a twin, and a binary digit is represented by the polarity of the potential induced at the middle point of the twin, which is controlled by the majority of input signals applied to the mid... View full abstract»

A large, extremely fast digital adder with sum selection and multiple-radix carry is described. Boolean expressions for the operation are included. The amount of hardware and the logical delay for a 100-bit ripple-carry adder and a carry-select adder are compared. The adder system described increases the speed of the addition process by reducing the carry-propagation time to the minimum commensura... View full abstract»

The character recognition problem, usually resulting from characters being corrupted by printing deterioration and/or inherent noise of the devices, is considered from the viewpoint of statistical decision theory. The optimization consists of minimizing the expected risk for a weight function which is preassigned to measure the consequences of system decisions As an alternative minimization of the... View full abstract»

Conditional-sum addition is a new mechanism for parallel, high-speed addition of digitally-represented numbers. Its design is based on the computation of ``conditional'' sums and carries that result from the assumption of all the possible distributions of carries for various groups of columns. A rapid-sequence mode of operation provides an addition rate that is invariant with the lengths of the su... View full abstract»

This paper describes a class of division methods best suited for use in digital computers with facilities for floating point arithmetic. The division methods may be contrasted with conventional division procedures by considering the nature of each quotient digit as generated during the division process. In restoring division, each quotient digit has one of the values 0,1, . . . , r -1, for an arbi... View full abstract»

The most important property of the codes derived in this paper is that two numbers, i and j, have coded forms, C(i) and C(j) that when added in a conventional binary adder, give a sum C(i)+C(j) that differs from C(i+j), the code for the sum, by (at most) an additive constant. This makes possible the detection and/or correction of errors committed by the arithmetic element of a computer. In additio... View full abstract»

Complex, flexible, computer programs can be written easily in list-processing languages. Storage registers are linked together in arbitrary sequences to form lists and list structures, which are the units of the languages. Special provisions are made for recursive subroutines and for hierarchical programs. These particular languages have been used to write game-playing, problem-solving, and other ... View full abstract»

As an attempt to investigate a general theory of real-time computability in digital computers, a subclass of Turing machines is formally introduced together with some classes of functions that are computable by them in real time. Then the existence is established of a class of recursive functions that are not computable in real time by use of a class of machines, no matter how general we make the ... View full abstract»

Counter stages having three stable states, and using no more components than standard binary counters, have been built by properly using the already present nonlinearity of grid current. Problems of stability, cascading, and decoding have been worked out. View full abstract»

The counters without short-time internal memory, conceived by Bigelow, disclosed by Ware, and extended by Brown, are discussed from the standpoint of their respective logic. It is shown that the (self-instructed) bidirectional1 counter of Brown has a more rigorous logic than the unidirectional counter of Ware; the operation of Brown's bidirectional counter being subjected to the only restriction t... View full abstract»

A fundamental problem in the design of fast (4 to 6 μsec) word oriented memories using S-1 core material is the realization of a sensing amplifier which has the multitude of required properties. The sense amplifier is usually required to provide stable gain for bipolarity signals, to introduce a negligible delay into the signal path, to avoid dc level shift, to recover within a short time ... View full abstract»

After a very brief summary of the various well-known methods of expediting carry-propagation in binary arithmetic units, the paper discusses and develops the ``anticipated-carry'' or ``carry-skip'' technique originally due in decimal form to Babbage, much used in mechanical calculators and lately revived for use in binary units. Various degrees of refinement are possible. It appears that for a giv... View full abstract»

The past decade has been a productive period for development in the field of large-scale digital computers. Magnetics has played an increasingly important part in these developments [1]-[8]. Magnetic cores, tapes, and drums have found almost universal acceptance for memory functions. Some future computers will undoubtedly use magnetic logic and control circuits. This survey is a capsule view of tw... View full abstract»

This paper describes a method for synthesizing a switching function directly from its: ruth table. A switching function is defined as any mapping of a set of binary input combinations onto 0 and 1. Hence, the procedures apply equally well to the don't care cases. The method rests on the concept alogically passive function (LPF). Roughly speaking, an LPF is a truth table which can be realized with ... View full abstract»

The Dip-Log Correlator is a special purpose electronic analog computer which rapidly cross correlates the three variable functions of a dip-meter well log. This cross correlator utilizes a novel derivation and application of the cross-correlation function from information theory. A prerequisite of the system is the recording of the dip-meter data on magnetic tape for computation by the cross corre... View full abstract»

A new approach to the mathematical representation of switching functions is presented. It was developed in connection with a theoretical study of magnetic-core logic, but the results are considered to be more basic and general than the core-logic problem. The ampere-turns (MMF) expression for core switching is shown to be part of a special type of Fourier series expansion of a switching function, ... View full abstract»

The permittivity or dielectric constant of the materials used in capacitors is not actually a constant but is a complex function of frequency and temperature. Consequently, the feedback capacitors used in the integrators of a differential analyzer cannot be considered ideal, but their capacitance must be considered a variable. Methods of representing the complex capacitance are discussed and a mod... View full abstract»

A special-purpose, binary computer called CORDIC (COordinate Rotation DIgital Computer) contains a unique arithmetic unit composed of three shift registers, three adder-subtractors, and suitable interconnections for efficiently performing calculations involving trigonometric functions. A technique is formulated for using the CORDIC arithmetic unit to convert between angles expressed in degrees and... View full abstract»

The synthesis of a threshold element which realizes a desired Boolean function as its output may be accomplished by solving a basic set of linear inequalities. The determination of this basic set is discussed with the aid of a geometric interpretation of such realizable functions on the vertices of a unit N cube. A solution may be obtained to these inequalities by linear programming. In this paper... View full abstract»

The Esaki diode is a potentially low-cost, high-speed two-terminal device exhibiting a short-circuit-stable negative resistance over a portion of its volt-ampere characteristic. By proper biasing and loading, it can be used to perform power amplification and memory functions. In this paper, a variety of digital computer circuits (a result of an early exploratory program) is described which utilize... View full abstract»

Simple, high-speed devices to convert binary, binary coded octal, or Gray code numbers to binary coded decimal numbers or vice versa is described. Circuitry required is four shift register stages per decimal digit plus one 30-diode network per decimal digit. In simple form the conversion requires two operations per binary bit but is theoretically capable of working at one operation per bit. View full abstract»

A stochastic model is presented which gives the probabilities of successful recognition of the Browning-Bledsoe recognition scheme as a function of scheme parameters and pattern variability parameters. Also, procedures are given for estimating the variability parameters from data so that the model can be used to predict readability. The adequacy of the model is checked by comparing estimated reada... View full abstract»

Maximum-likelihood encoding and decoding procedures are presented for cyclic permutation error-correcting codes. These procedures take advantage of the cyclic permutation structure, and are applicable to all such codes. On the other hand, familiar parity-checking procedures are applicable only to those few cyclic permutation codes which are group codes. A comparison of the two different procedures... View full abstract»

Techniques are developed for the logical design of magnetic core circuits to produce arbitrary single-output combinational switching functions. The approach is based on the relationship of a single magnetic core circuit to a linearly separable switching function. A synthesis procedure is developed which uses a pair of logical primitives, AND with NOT and OR with NOT, which are similar to the STROK... View full abstract»

In this paper, the problem of determining economical state assignments for finite-state sequential machines is studied. The fundamental idea in this study is to find methods for selection of these assignments in which each binary variable describing the new state depends on as few variables of the old state as possible. In general, these variable assignments in which the dependence is reduced yiel... View full abstract»

An all-magnetic logic scheme is one with which a workable digital system could be constructed involving only magnetic elements, current-carrying conductors, and sources of clock pulses. Historical developments of both resistance schemes (dependent upon coupling-loop resistance) and nonresistance schemes (possessing at least first-order independence of coupling-loop resistance) are described, with ... View full abstract»

In this paper, networks of finite-state machines, rather than individual machines, are discussed. The investigation centers around cascade networks, where the output of one machine serves as an input to another. It is shown how, by means of connection matrices, the characteristics of such a network can be obtained from those of the component machines, and how a specified machine can be decomposed ... View full abstract»

The card-changeable permanent-magnet-twistor memory is a large capacity (ca 105 bits) storage media for information that is infrequently changed. The information is stored in the form of small bar magnets bonded to a removable plastic card. The magnets, when magnetized, inhibit the switching of a section of twistor wire at a twistor-wire-solenoid crosspoint. For maximum information dens... View full abstract»

The application of the Hall effect to a general-purpose four-quadrant multiplier is discussed. Circuit diagrams for the transistor amplifiers are given. An evaluation of the experimental results is given for a breadboard model of the multiplier. Static accuracies on the order of 1 per cent to 3 per cent are obtained for the Hall channel and the magnetic channel, respectively. Bandwidths of 25 kc a... View full abstract»

This is the author's report of his visit to the Soviet Union in June and July, 1960. The purpose of the trip was to attend the First Congress of the International Federation of Automatic Control (IFAC) as an official American delegate. The author also arranged to meet with certain scientists in psychology, physiology, and the computer sciences, and to visit some Russian research institutions doing... View full abstract»

The vertex frame is similar to an n-dimensional cube or Tychonoff frame that has been cut and unfolded into the shape of a Karnaugh map. The methods of use are similar to those for Karnaugh maps. Minimal disjunctive and conjunctive normal formulas are found for problems with or without don't-care cases. The selection graph, a linear graph, is used to enhance the prime antecedent (= prime implicant... View full abstract»

After a brief survey of the basic Atlas machine, the paper describes an automatic system which in principle can be applied to any combination of two storage systems so that the combination can be regarded by the machine user as a single level. The actual system described relates to a fast core store-drum combination. The effect of the system on instruction times is illustrated, and the tape transf... View full abstract»