IEEE Transactions on Electronic Computers

This paper develops the separating capacities of families of nonlinear decision surfaces by a direct application of a theorem in classical combinatorial geometry. It is shown that a family of surfaces having d degrees of freedom has a natural separating capacity of 2d pattern vectors, thus extending and unifying results of Winder and others on the pattern-separating capacity of hyperplanes. Applyi... View full abstract»

It is suggested that the economics of present large-scale scientific computers could benefit from a greater investment in hardware to mechanize multiplication and division than is now common. As a move in this direction, a design is developed for a multiplier which generates the product of two numbers using purely combinational logic, i.e., in one gating step. Using straightforward diode-transisto... View full abstract»

A set of conditions are described which determine whether or not two successive portions of a given program can be performed in parallel and still produce the same results. The conditions are general and can be applied to sections of the program of arbitrary size. The conditions are interesting because of the light they shed on the structure of programs amenable to parallel processing and the memo... View full abstract»

This paper describes error-correction adjustment procedures for determining the weight vector of linear pattern classifiers under general pattern distribution. It is mainly aimed at clarifying theoretically the performance of adaptive pattern classifiers. In the case where the loss depends on the distance between a pattern vector and a decision boundary and where the average risk function is unimo... View full abstract»

Equations are developed which accurately describe the characteristic impedance and signal propagation delay for narrow microstrip transmission lines. Differences in signal propagation delay for microstrip, strip line, and coaxial cables are compared as a function of dielectric constant. The characteristic impedance equation is verified through comparison with experimental results for impedance val... View full abstract»

Two identical low-pass electrical filters, having any realizable low-pass frequency-response characteristic and synthesized from linear analog computer components by any convenient method, may be interconnected in a simple manner to form a band-pass filter whose frequency-response characteristic represents a translation along the frequency axis of the frequency response characteristic of the origi... View full abstract»

A practical method of determining weights for crossproduct and power terms in the variable inputs to an adaptive threshold element used for statistical pattern classification is derived. The objective is to make it possible to realize general nonlinear decision surfaces, in contrast with the linear (hyperplanar) decision surfaces that can be realized by a threshold element using only first-order t... View full abstract»

The use is discussed of a fast core memory of, say, 32000 words as a slave to a slower core memory of, say, one million words in such a way that in practical cases the effective access time is nearer that of the fast memory than that of the slow memory. View full abstract»

The paper gives a survey of the learning circuits which became known as learning matrices and some of their possible technological applications. The first section describes the principle of learning matrices. So-called conditioned connections between the characteristics of an object and the meaning of an object are formed in the learning phase. During the operation of connecting the characteristic... View full abstract»

This paper treats the problem of automatic fault diagnosis for systems with multiple faults. The system is decomposed into n units u1, u2, . . . , un, where a unit is a well-identifiable portion of the system which cannot be further decomposed for the purpose of diagnosis. By means of a given arrangement of testing links (connection assignment) each unit of the sys... View full abstract»

This paper describes the development of a procedure that enables a digital computer to solve ``apictorial'' jigsaw puzzles, i.e., puzzles in which all pieces are uniformly gray and the only available information is the shape of the pieces. The problem was selected because it provided an excellent vehicle to develop computer techniques for manipulation of arbitrary geometric patterns, for pattern i... View full abstract»

The problem of recognizing a large alphabet (1000 different characters) is approached using a two stage process. In the first stage of design, the data is partitioned into groups of similar characters by means of heuristic and iterative algorithms. In the second stage, peephole templates are generated for each character in such a way as to guarantee discrimination against other characters in the s... View full abstract»

A Boolean function has an inverse when every output is the result of one and only one input. There are 2n! Boolean functions of n variables which have an inverse. Equivalence classes of these functions are sets of equivalent functions in the sense that they are identical under a group operation on the input and output variables. This paper counts through five variables the number of equ... View full abstract»

In the design of sequential relay circuits one often has to consider the circuit as a part of a larger system, and one must take into account the nature of the inputs to the circuit. Frequently, the inputs are two-terminal contact networks with one terminal grounded; such inputs will be called simple. This paper examines the formal design techniques as applied to circuits with simple inputs. It is... View full abstract»

A tabulation of the 2470 representative threshold functions of seven arguments has been prepared by the author. This paper discusses the methods used in, and the threshold logic implications of, the enumeration. The self-dual classification method of Goto-Takahasi was employed. A lattice was defined on the 8-cube in terms of which all 2-monotonic, canonical, self-dual functions of eight arguments ... View full abstract»

Properties of self-dual threshold functions are discussed because of the importance of self-dual functions in threshold logic. Since any threshold function can be easily converted into or reduced from a positive self-dual threshold function, we will not lose generality in discussion by exploring the properties of positive self-dual threshold functions. First functions generated by additively or su... View full abstract»

Widespread and persistent interest in the implementation of multilevel logic, conditional probability computers, learning machines, and brain models has created a need for an inexpensive analog or quasi-digital storage element. A number of possible approaches to this problem, ranging from the slow and reliable electromechanical systems to the many forms of charge and flux integration, are reviewed... View full abstract»

The class of one-dimensional, real-time, iterative, discrete-state automata is described. By example, it is shown that serial multiplication can be carried out by such a sequential switching network. Each of two arbitrarily large integers is represented in binary notation by a time sequence of digits 0 or 1, the lowest order digits first. A design is given for a discrete-state machine that has as ... View full abstract»

To translate descriptors into memory locations a memory organization scheme called the balanced tree is introduced, The descriptors that describe the information to be stored or retrieved constitute quasi-inputs to the tree while the outputs are lists on which the information identified by the descriptors is stored. The balanced tree thus provides a stratagem to effect a fast information retrieval... View full abstract»

IN this paper we will describe an algorithm for the decomposition of UP-DOWN counters. The constituents of the decomposed counters will be UP-DOWN counters of small modulus and small amounts of combinatorial logic. The main advantage accruing from this decomposition technique is that only a small number of building blocks is required to build counters with any modulus. We will begin the discussion... View full abstract»

A new kind of machine is proposed, in which the continuous variable is represented as a probability of a pulse occurrence at a certain sampling time. It is shown that threshold gates can be used as simple and inexpensive processors such as adders and multipliers. In fact, for a random-pulse sequence, any Boolean operation among individual pulses will correspond to an algebraic expression among the... View full abstract»

In this paper, the authors study ``fail-safe'' properties of logical systems, finding the conditions that the basic logical functions of fail-safe logical systems should satisfy and also identifying the allowable failures for the basic logical function circuits. With these results, the authors present a systematic representation of fail-safe logical systems, and an effective method of logical desi... View full abstract»

Two algorithms are presented: one, DALG-II, computes a test to detect a failure in acyclic logic circuits; the other, TEST-DETECT, ascertains all failures detected by a given test. Both are based upon the utilization of a ``calculus of D-cubes'' that provides the means for effectively performing the necessary computations for very large logic circuits. Strategies for combining the two algorithms i... View full abstract»

The analog-hybrid computer Monte Carlo technique for solving elliptic and parabolic partial differential equations has been implemented on a new hybrid computer capable of taking statistics over 1000 two-or three-dimensional random walks per second. This exceptional computing speed and flexible digital control permit direct plotting of partial differential equation solutions; of perhaps even great... View full abstract»

The two-dimensional ``hidden-line'' problem is the problem of determining, by means of a computer algorithm, which edges or parts of edges of an arbitrary, nonintersecting polygon are visible from a specified vantage point in the plane of the polygon. The problem is an important one in the field of computer graphics, and is encountered, for example, in using a computer to determine the portion of ... View full abstract»

The methods for determining the carry skip distributions in the adders with the minimum carry propagation time and the minimum number of carry skip circuits for a given carry propagation time are presented on the assumption that every adder position is comprised either in one skip at most or in two skips at most. Two types of adders with carry skips and each of them without and with end-around-car... View full abstract»

This paper presents a survey of the present state-of-the-art and anticipated future developments in read/write internal memories and on-line auxiliary memories. Functional uses of storage are discussed and advanced memory technologies are categorized by their applicability to each functional level in the storage hierarchy. Eight types of advanced solid-state memories are discussed briefly. Charact... View full abstract»

The notion of a threshold function is generalized to a Boolean function of threshold order r. Two characterizations of a Boolean function of threshold order r are presented, which are generalizations of the results of Kaplan and Winder and of Chow, for the case r = 1. Kaplan and Winder's characterization of a threshold function by means of Chebyshev approximation is generalized to a Boolean functi... View full abstract»

This paper presents tables of all-pass rational transfer functions that approximate a time delay τ to within an error ϵ for frequencies ω such that 0≤ωτ≤k. The coefficients are optimized to maximize the bandwidth k, if the order n of the transfer function and the maximum error ϵ are predetermined by the user. Two sets of tables are gi... View full abstract»

The gating of asynchronous signals causes logical errors. It is possible to reduce the frequency of these errors, but the price paid is a severe loss of time and extra cost in hardware. View full abstract»

An approximation to the computation of the base two logarithm of a binary number, realized with binary circuitry, is described. It is known that the logarithm can be obtained approximately from the binary number itself by simple counting and shifting. A method for the reduction of the resulting approximation error by a factor six is given. The same principle can be used for further reduction of th... View full abstract»

Cascades of two-input, one-output general function cells have been studied previously with the restriction that no external variable may drive more than one cell. Upon relaxing this restriction, it is shown that a variable that drives more than one cell in a cascade need never drive more than one cell that is not an EXCLUSIVE-OR cell, and that cell must be the first cell driven by the variable in ... View full abstract»

Solving prime implicant tables is greatly facilitated by reduction techniques such as row dominance, column dominance, and essential row selection. This paper presents a new reduction technique which is operable on any otherwise irreducible table having a column covered by exactly two rows. View full abstract»

The``state' of a sequential machine is interpreted as the sequence-to-sequence input-output mapping performed by the machine. Such mappings have been called sequential functions. This concept of state is applied to the theory of binary linear sequential machines. The modulo-2 adders are assumed to have an inherent delay td≥0, and the effects of initial conditions are considered.... View full abstract»

Where previous authors have considered linear approximations with a minimum sum of squared differences, we consider, instead, Chehyshev linear approximations, which minimize the maximum deviation. We obtain thus: 1) A new characterization of threshold functions, 2) A characterization of optimal threshold realizations as being virtually identical to the Chebyshev-best linear approximations, and 3) ... View full abstract»

A diagrammatic approach to the problem of synthesizing multilevel logic functions is presented. It has the advantage of giving a visual interpretation to such abstract concepts as fan-in, levels of logic, decomposition, and two-level forms. View full abstract»

A lower bound on the number of threshold functions and a lower bound on the maximum of minimum weights of a threshold element are derived from a recursively constructed family of threshold elements. All threshold functions of n variables are difficult to construct for a general value of n, but it is shown that a large number of them can be constructed recursively from threshold functions of fewer ... View full abstract»

This paper presents the results of an attempt to automate part of a formalized method of system design. Basic to this method are two languages, Boolean algebra and a register transfer language. From a Boolean algebra description a digital system can be constructed while the second language can be used in a step by step description of the execution of each instruction. To illustrate, a register tra... View full abstract»

This paper presents methods for realizing simple threshold functions of n arguments by networks of k-input majority gates, where k≪n. An optimal network realization of the 5-argument majority function using 3-input majority gates is given, and it is then generalized by steps with realizations for the (2n-l)-argument majority function (where n = 3, 4, ...) using (2n-3)-input majority gates, ... View full abstract»

The feasibility of a large-scale microprogrammed computer and some variations and extensions of Wilkes' scheme are examined. A general scheme is discussed to improve flexibility and reduce the number of micro-orders through massive use of the conditions for the next micro-order. A variable-cycle timing system that permits the speed of a synchronized computer to approach that of an asynchronous one... View full abstract»

A computing technique is described which employs several computing elements to solve algebraic, transcendental and integro-differential equations operational-digital. Information between the different computing elements is carried in the form of pulse-width signals. Each computing elements employs only digital circuits, but in an analog fashion. The proposed hybrid technique overcomes the accuracy... View full abstract»

A definite automaton is, roughly speaking, an automaton (sequential circuit) with the property that for some fixed integer k its action depends only on the last k inputs. The notion of a definite event introduced by Kleene, as well as the related concepts of definite automata and tables, are studied here in detail. Basic results relating to the minimum number of states required for synthesizing an... View full abstract»

This report gives a complete catalog of minimal NOR circuits and minimal NAND circuits, assuming complements not available, for all logic functions of three variables. Minimal circuits for a function are those that satisfy these conditions: 1) The number of logic blocks of the circuit is least possible for performing the function; 2) The number of connections in the circuit (total number of inputs... View full abstract»

A digital technique for manipulating symbols defining a mathematical expression is introduced and it is shown how this technique can be applied so that a digital computer can automatically compile an analog computer program directly from a mathematical description of the problem to be solved. The mathematical problem considered is that of solving a system of nonlinear first-order differential equa... View full abstract»

A diode-resistor network technique for simulating functions of any number of variables is described. The function is approximated by a polyhedron, or its N-dimensional equivalent, and this polyhedral model is generated directly by the circuit. The circuit is formed of two cascaded sections: the first, using resistive networks, generates voltages representing each of the faces of the polyhedron; th... View full abstract»