Influence of Humidity on the Power Cycling Lifetime of SiC MOSFETs

Power cycling test (PCT) is widely used to accelerate power semiconductor device aging and assess its packaging reliability. Standard PCT only considers thermomechanical stress and neglects the effect of humidity from the environment. In this article, the power cycling lifetime of three groups [Group 1: devices under test (DUTs) preaged with 3600-h high-voltage high-humidity high-temperature reverse bias test (HV-H3TRB), Group 2: DUTs preaged with 3600-h high-temperature high-humidity storage, and Group 3: DUTs without preaging] is compared to explore the contribution of high humidity and high voltage. The results show that Groups 1 and 2 have a shorter lifetime, and the shape factor of Group 2 in Weibull analysis drops below 1, indicating that a sign of infant mortality and moisture is the root cause. After decapsulation, optical inspection, and scanning electron microscope (SEM), it is found that the bubbles form at edge termination, and the corrosion signs of moisture appear on the chip surface and bond wire in DUTs of Groups 1 and 2. This phenomenon is caused by the elements of C, O, and Si migration and deposition on the bond wire, which radically come from epoxy molding compound (EMC) and finally result in a shorter power cycling lifetime of discrete silicon carbide metal–oxide–semiconductor field-effect transistors (SiC MOSFETs).