A LPDDR4X Low Jitter Driver Scheme with High Speed

Advanced design techniques with higher speed and reduced current is more and more important in LPDDR4X driver design. Two techniques for improving timing margin are proposed in this paper. Edge boost technique improves the timing margin in LPDDR4X 4.266Gbps data rate. Cross coupled latch clock buffer controlled by frequency information achieves better eye performance by improving clock duty cycle.