A High-performance Small Target Defect Detection Method for PCB Boards Based on a Novel YOLO-DFA Algorithm

Defect detection in printed circuit boards (PCBs) is a crucial factor influencing the stability and reliability of equipment performance. However, the compact structure of PCBs presents significant challenges for accurately identifying small surface defects against complex backgrounds. To address this challenge, this paper introduces an enhanced YOLOv10 algorithm featuring a dual backbone parallel network, fine-grained feature enhancement, and an adaptive scale-enhanced CIOU Loss (YOLO-DFA). Firstly, a dual-backbone architecture is implemented to minimize information loss through the auxiliary backbone. Secondly, during the feature fusion phase, we introduce a fine-grained feature enhancement method combined with a dynamic weighting mechanism to bolster the model’s capacity for capturing intricate features while enhancing noise resilience. Finally, to mitigate the dominance of larger targets in loss calculations, we propose an adaptive scale-enhanced loss function (ASC-CIOU), which adjusts penalty coefficients to more accurately capture errors associated with small targets and improve fitting precision. Experimental results indicate that compared to several state-of-the-art models, our approach achieves a Mean Average Precision (MAP) of 96.4% on the open-source PCB defect dataset-an unprecedented level of accuracy particularly effective in detecting short circuits and spur defects. Furthermore, heatmap visualizations substantiate the model’s exceptional ability to focus on target areas, thereby validating the superiority of our proposed YOLO-DFA algorithm. Additionally, the high accuracy demonstrated by YOLO-DFA on a PCB classification dataset provides further evidence of its generalization capability.