High Density Integration of Silicon Photonic Chiplets for 51.2T Co-packaged Optics

This paper shows the high-density integration of CMOS based silicon photonic chiplets to achieve an optical engine bandwidth of 6.4Tb/s and deliver an all-optical 51.2Tb/s co-packaged optics (CPO) switch solution. An industry first prototype system by co-packaging eight engines with switch die that can deliver double the bandwidth of a 25.6Tb/s solution.