A PSR Enhancement Scheme: An Overview of Feed-Forward Ripple Cancellation Technique

Power supply rejection (PSR) is a critical performance metric that evaluate the LDO’s ability to suppress supply noise. Typical analog low drop-out regulator (A-LDO) achieves high PSR at low-frequency region and light load conditions. However, the PSR performance degrades due to reduced loop gain of an LDO at high frequencies and heavy load currents. Prior works on enhancing the PSR performance include increasing loop bandwidth or loop gain, using cascode structure by stacking transistors on power transistor, cascading two regulators. While these techniques improve the PSR at the cost of increasing design complexity and increasing losses. Compared with the above methods, the feed-forward ripple cancellation (FFRC) technique, being an auxiliary feed-forward path, can effectively improve the PSR performance of the LDOs at the expense of low design complexity and quiescent power and becomes the focus of researchers. In this paper, the injection methods of FFRC and four different FFRC circuit structures are overviewed, compared, and discussed. Then, the design guideline for a high PSR and low quiescent current A-LDO is drawn.